Method of narrowing threshold voltage distribution

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S218000, C365S230040, C365S185240

Reexamination Certificate

active

06829174

ABSTRACT:

BACKGROUND OF INVENTION
1. Field of Invention
The present invention relates to a method of narrowing threshold voltage distribution. More particularly, the present invention relates to a method of separating out erase and erase identification of odd memory cells from erase and erase identification of even memory cells in an advanced non-volatile memory such that threshold voltage distribution is narrowed.
2. Description of Related Art
A non-volatile memory (such as a flash memory) is a type of electrically erasable programmable read only memory (EEPROM) capable of receiving program data, erasing stored data and retaining data even when power to the memory is cut. With such advantages, non-volatile memory is one of the most widely used memory devices inside personal computers and electronic equipment.
As fabrication techniques continue to improve, miniaturization is a principle goal in the design of non-volatile memory. As a result, miniaturized advanced non-volatile memory is developed. An advanced non-volatile memory includes a plurality of odd memory cells and a plurality of even memory cells. For an advanced non-volatile memory, if there is contact misalignment, erase speed in the odd memory cells will differ from erase speed in the even memory cells. When the contact is close to an odd memory cell, the erase speed of the odd memory cell will be slower than the erase speed of the even memory cell. However, in a conventional advanced non-volatile memory, the erase and erase identification of the odd memory cells and the even memory cells are carried out together. Hence, the distribution of threshold voltage for triggering an erasing operation in a conventional advanced non-volatile memory is wide. The wide distribution of threshold voltage has serious consequences for advanced non-volatile memory. For example, should the memory be over-erased in an erasing operation, a negative threshold voltage may be produced leading to an abnormal functioning of the advanced non-volatile memory.
SUMMARY OF INVENTION
Accordingly, one object of the present invention is to provide a method of narrowing the threshold voltage distribution of a memory device. This invention utilizes the separation of erase and erase identification of the odd memory cells from the erase and erase identification of the even memory cells to narrow down the distribution of threshold voltage in an advanced non-volatile memory. Thus, the disadvantages of having too large a distribution of threshold voltage in a conventional advanced non-volatile memory are eliminated.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of narrowing the threshold voltage distribution of a memory. The method is applicable to a contact misaligned advanced non-volatile memory. The advanced non-volatile memory includes a plurality of odd memory cells and a plurality of even memory cells. In the method, erase and erase identification of all the odd memory cells are carried out first and then followed by the erase and erase identification of all the even memory cells.
In one embodiment of this invention, the erasing speed of the odd memory cells differs from the erasing speed of the even memory cells. If the gate-coupling ratio of the odd memory cells is smaller than the gate-coupling ratio of the even memory cells, the erasing speed of the odd memory cells will be slower than the erasing speed of the even memory cells. On the other hand, if the gate-coupling ratio of the odd memory cells is larger than the gate-coupling ratio of the even memory cells, the erasing speed of the odd memory cells will be faster than the erasing speed of the even memory cells.
In another embodiment of this invention, the erase identification speed of the odd memory cells differs from the erase identification speed of the even memory cells. If the gate-coupling ratio of the odd memory cells is smaller than the gate-coupling ratio of the even memory cells, the erase identification speed of the odd memory cells will be slower than the erase identification speed of the even memory cells. On the other hand, if the gate-coupling ratio of the odd memory cells is larger than the gate-coupling ratio of the even memory cells, the erase identification speed of the odd memory cells will be faster than the erase identification speed of the even memory cells.
This invention also provides a method of narrowing the threshold voltage distribution of a memory. The method is applicable to a contact misaligned advanced non-volatile memory. The advanced non-volatile memory includes a plurality of odd memory cells and a plurality of even memory cells. In the method, program and program identification of all the odd memory cells are carried out first and then followed by the program and program identification of all the even memory cells.
In one embodiment of this invention, the programming speed of the odd memory cells differs from the programming speed of the even memory cells. If the gate-coupling ratio of the odd memory cells is smaller than the gate-coupling ratio of the even memory cells, the programming speed of the odd memory cells will be slower than the programming speed of the even memory cells. On the other hand, if the gate-coupling ratio of the odd memory cells is larger than the gate-coupling ratio of the even memory cells, the programming speed of the odd memory cells will be faster than the programming speed of the even memory cells.
In another embodiment of this invention, the program identification speed of the odd memory cells differs from the program identification speed of the even memory cells. If the gate-coupling ratio of the odd memory cells is smaller than the gate-coupling ratio of the even memory cells, the program identification speed of the odd memory cells will be slower than the program identification speed of the even memory cells. On the other hand, if the gate-coupling ratio of the odd memory cells is larger than the gate-coupling ratio of the even memory cells, the program identification speed of the odd memory cells will be faster than the program identification speed of the even memory cells.
In brief, this invention utilizes the separation of the erase and erase identification of the odd memory cells from the erase and erase identification of the even memory cells to narrow the distribution of threshold voltage in an advanced non-volatile memory. Hence, this invention is capable of eliminating all the weaknesses caused by too large a threshold voltage distribution as in a conventional advanced non-volatile memory.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


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