Method of multiplex/demultiplex processing of information and eq

Multiplex communications – Wide area network – Packet switching

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370112, H04J 304

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active

048667110

ABSTRACT:
An information processing system includes a transmitter, which converts parallel information to serial, and a receiver, which receives the serial information and reconverts the same to parallel for use by a further processing unit. Structure is provided to eliminate a requirement for a separate transmission line for transmission of a synchronization signal for synchronizing the receiver to function properly in receiving information. More coupling points are provided at the transmitter than at the receiver, for coupling information into the serial information path. The additional coupling points are used to transmit flag information together with the data being transmitted, the flag information being used to produce a detection signal. The detection signal is used to gate the received signals from a receiving signal path to various storage devices, thus converting the received serial information to parallel form in response to the flag signals which are serially transmitted together with the data.

REFERENCES:
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patent: 3571516 (1971-03-01), Ohyama et al.
patent: 3763318 (1973-10-01), Ross et al.
patent: 4513427 (1985-04-01), Borriello et al.
patent: 4630256 (1986-12-01), Albanese
A. Davidson, S. M. Faris and H. C. Jones, "Time Domain Multiplexer-Driver and Receiver for Chip-to-Chip Communication", IBM Technical Disclosure Bulletin, vol. 21, No. 11, Apr. 1979, pp. 4705-4710.

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