Method of monitoring registers during emulation

Details Method of monitoring registers during emulation Method of monitoring registers during emulation

1995-11-01

1999-02-16

Teska, Kevin J.

G06F 9455, G06F 1130

Patent

active

058729542

ABSTRACT:
A method for reading various registers of a computer system without changing the emulator software. Address register 22, data memory I/O 30 and control register 26 surrounding D-MEM (data memory) 14 are configured as registers of a master/slave latching circuit in which serial scanning is possible, and are sequentially scanned during one scanning pass (1). Data memory I/O register 30 is connected to D-BUS (data bus) 10. External I/O registers RG1, RG2, . . . RGn are respectively connected to D-BUS (data bus) 10 and mapped in the I/O space. An IN'/OUT' instruction which can transfer data between data memory I/O register 30 and each external I/O register RG1 (i=1, 2, . . . , n) is generated.

REFERENCES:
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patent: 5329471 (1994-07-01), Swoboda et al.
patent: 5497456 (1996-03-01), Alexander et al.
patent: 5657328 (1997-08-01), Swoboda

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