Method of modifying a microinstruction with operands specified b

Details Method of modifying a microinstruction with operands specified b Method of modifying a microinstruction with operands specified b

1990-12-20

1993-06-22

Harrell, Robert B.

Boots, shoes, and leggings

395375, 364DIG2, 364931, 3649462, 3649465, 3649466, 3649467, G06F 922, G06F 934, G06F 940

Patent

active

052222446

ABSTRACT:
An aliasing logic (100) in an instruction decoder. If a complex microinstruction flow is in progress, it operands can be accessed through alias registers (116). This allows indirect access to a source or destination register specified by the operands of the macrocode instruction or the opcode of the macroinstruction while executing a sequence of microinstructions. These aliased operands are maintained by the macroinstruction aliasing logic (100) in the register (116). The instruction decoder issues new instructions by driving a machine bus (110) with the correct information during each clock cycle. Mousetrap multiplexer (104) chooses between several sources of opcode and operand fields and routes the them to the machine bus (110) through several translation stages and multiplexers.

REFERENCES:
patent: 5136696 (1992-08-01), Beckwith et al.

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