Method of modifying a microchip layout data set to generate...

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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Reexamination Certificate

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06261724

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to designing reticles or masks that are used in optical projection lithography systems.
BACKGROUND OF THE INVENTION
Optical projection lithography systems are used to make large scale integrated circuits, or chips. A principal advantage of these systems is that they may be used to manufacture extremely fine patterns. Typically, masks or reticles are created that contain the pattern for a layer of material that will be used in the construction of a microchip. Light is projected through such a mask onto a photosensitive layer on a semiconductor wafer; further processing of the photosensitive material results in the pattern on the mask being transferred to the photosensitive film, which is then later used to create corresponding patterns by means such as etching, depositing, oxidizing or implanting materials on the semiconductor wafer.
Distortions and imperfections that exist within the optical projection mask, from the intended pattern, typically result in a lower quality pattern that is transferred to the photosensitive film on the wafer, and that is then transferred into the materials on the semiconductor wafer. The more distortions, the less likely the final resulting microchip circuitry will work properly, if at all.
Consequently, it is important that the mask be properly designed and manufactured. Because chip designs are usually pushing the limits of the small sizes of patterns that can be created on a chip, the process of transferring chip design shapes to a mask typically induces distortions in the'shapes as they appear on the mask. In particular, inner and outer corners are not only not square but have different radii of curvature. So-called resolution enhancements such as serifs commonly used for optical proximity correction may be badly distorted on the mask since they are typically smaller than the nominal minimum feature size for a given mask level. Hence, characterizing these distortions and taking them into account when designing a mask can significantly improve the quality of the mask that is created, thereby also potentially resulting in considerably improved printed patterns on the wafer. Since these effects may be important in determining the ultimate wafer level image, it is necessary to include them in the overall modeling strategy used to predict the printed shapes on a semiconductor wafer, given the design layout data.
SUMMARY OF THE INVENTION
An object of this invention is to improve methods for designing photolithography masks by improving the prediction of mask making features, thereby enabling the improvement of prediction of features that are created on semiconductor wafers.
Another object of the present invention is to design photolithography masks in a way that takes into account image foreshortening and corner rounding of the images on the mask.
These and other objects are attained with a method for predicting a “wafer image”, meaning here, the printed pattern on a semiconductor wafer, given the intended design layout data for the pattern. This method comprises the steps of, first, determining, by applying process bias and corner curvature rules to the design layout for a mask, the creation of the predicted shape of the manufactured mask pattern. This mask pattern that is created will subsequently be referred to as the “mask image”. Second, this simulated mask image will be used in conjunction with optical proximity correction rules and models to simulate and predict the patterns created either within the photoresist material, and/or within the subsequent materials on the semiconductor wafer. Hereafter, the patterns on the wafer will be referred to as the “wafer image”.
By accurately taking into account the process used in the construction of the mask, and then by using simulation methods to predict the subsequent patterns created on the wafer by this mask, more accurate predictions will result of the final patterns created than if the mask making process is not taken into account. It is a key purpose of the present invention to provide this improved accuracy, and in a way that is fast, reliable, and does not incur undue computational resources. The proposed method will work well for stable and repeatable mask making processes, such as are conventionally used in semiconductor manufacturing. More specifically, corner rounding and mask biasing on optical projection masks are usually very evident and repeatable; including these characteristics into the design process is a key point of this patent. Preferably the simulated mask image is determined by applying a symmetric bias consistent with a mask build process to the Mask design data, adjusting predetermined features of the mask data such as corners or narrow lines, and applying a reverse symmetric bias to the adjusted mask design data.
Further benefits and advantages of the invention will become apparent from a consideration of the following detailed description, given with reference to the accompanying drawings, which specify and show preferred embodiments of the invention.


REFERENCES:
patent: 4585342 (1986-04-01), Lin et al.
patent: 4621371 (1986-11-01), Gotou et al.
patent: 5308991 (1994-05-01), Kaplan et al.
patent: 5402224 (1995-03-01), Hirukawa et al.
patent: 5442418 (1995-08-01), Murakami et al.
patent: 5721074 (1998-02-01), Bae
patent: 5795688 (2000-03-01), Burdorf et al.
patent: 5804340 (1998-09-01), Garza et al.
patent: 5972541 (1999-10-01), Sugasawara et al.
patent: 6044007 (2000-03-01), Capodieci
patent: 6081658 (2000-06-01), Rieger et al.

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