Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Reexamination Certificate
2000-08-07
2004-07-27
Dharia, Rupal (Department: 2141)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
Computer-to-computer data transfer regulating
C370S241000, C370S253000, C370S252000, C370S473000
Reexamination Certificate
active
06769029
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a method of measuring a transmission delay and, in particular, to a method of measuring a transmission delay in a packet network.
A packet network has various performance indices, one of which is a transmission delay produced when a packet is transmitted through the packet network. Such transmission delay in the network can be measured in the following manner. The packet network is connected to two monitoring terminals having clocks independent from each other. A packet is transmitted from one of the monitoring terminals to the other. The one terminal as a transmission terminal records a transmission time instant Ts when the packet is transmitted to the packet network. The other terminal as a reception terminal records a reception time instant Te when the packet is received from the packet network. By calculating the difference (Te−Ts) between the reception time instant Te and the transmission time instant Ts, the transmission delay is obtained.
In the above-mentioned technique, however, the clocks of the two monitoring terminals must be synchronized with each other. It is therefore required to install a special application program for measurement of a time difference and for clock synchronization. Without such clock synchronizing function, the delay can not be measured.
In view of the above, proposal is made of a measuring method requiring no clock synchronizing function, for example, in Japanese Unexamined Patent Publication (JP-A) No. H02-137538. The measuring method (hereinafter referred to as a conventional method) disclosed in the above-mentioned publication will be described in conjunction with FIG.
1
.
Referring to
FIG. 1
, a packet network
100
includes first and second packet switching processors
101
and
102
having first and second clocks
103
and
104
independent from each other, respectively. The second dock
104
is &agr; seconds faster than the first clock
103
. The first and the second packet switching processors
101
and
102
accommodate first and second terminals
105
and
106
, respectively.
It is assumed that the first packet switching processor
101
is supplied from the first terminal
105
with a data packet DT
10
containing data D
10
and addressed to the second terminal
106
. In this event the first packet switching processor
101
acquires a current time instant as a transmission time instant t
10
from the first clock
103
and delivers to the second packet switching processor
102
the data packet DT
10
with the transmission time instant t
10
added thereto. Supplied with the data packet DT
10
, the second packet switching processor
102
acquires a current time instant as a reception time instant t
20
from the second clock
104
and delivers to the second terminal
106
the data packet DT
10
containing the data D
10
. Simultaneously, the second packet switching processor
102
calculates a time difference &Dgr;
20
(=t
20
−t
10
) between the reception time instant t
20
and the transmission time instant t
10
added to the data packet DT
10
.
On the contrary, it is assumed that the second packet switching processor
102
is supplied from the second terminal
106
with a data packet DT
20
containing data D
20
and addressed to the first terminal
105
. In this event, the second packet switching processor
102
acquires a current time instant as a transmission time instant t
21
from the second clock
104
and delivers to the first packet switching processor
101
the data packet DT
20
with the transmission time instant t
21
and the above-mentioned time difference &Dgr;
20
added thereto. Supplied with the data packet DT
20
, the first packet switching processor
101
acquires a current time instant as a reception time instant t
11
from the first clock
103
and delivers to the first terminal
105
the data packet DT
20
containing the data D
20
. Simultaneously, the first packet switching processor
101
calculates a time difference &Dgr;
11
(=t
11
−t
21
) between the reception time instant t
11
and the transmission time instant t
21
added to the data packet DT
20
. Furthermore, the first packet switching processor
101
calculates a sum of the time differences &Dgr;
11
and &Dgr;
20
, i.e., a total delay (&Dgr;
11
+&Dgr;
20
) required for round-trip transmission, including forward transmission and backward transmission, of a data packet through the packet network
100
.
It is supposed that, during the forward transmission and the backward transmission of the data packets DT
10
and DT
20
through the packet network
100
, network delays d
1
and d
2
are produced, respectively. Then, the above-mentioned time differences &Dgr;
11
and &Dgr;
20
are represented by:
&Dgr;
20
=
t
20
−
t
10
=
d
1
+&agr;
&Dgr;
11
=
t
11
−
t
21
=
d
2
−&agr;
From the foregoing, the total delay (&Dgr;A+&Dgr;
20
) is calculated as:
&Dgr;
11
+&Dgr;
20
=(
d
1
+&agr;)+(
d
2
−&agr;)=
d
1
+
d
2
Thus, the total delay is given as the sum of the network delays d
1
and d
2
and does not contain the time difference &agr; between the first and the second clocks
103
and
104
.
The above-mentioned measurement is repeatedly carried out for each of a large number of data packets transferred through the packet network
100
to obtain a large number of total delays. Thus, the delays produced while the data packets flow through the packet network
100
are statistically obtained.
In the above-mentioned conventional method, it is possible to statistically obtain the delays in the packet network without requiring the clock synchronization. However, each individual delay thus obtained is a round-trip delay as a total sum of a forward-transmission delay and a backward-transmission delay in the packet network. In other words, it is impossible to individually obtain a transmission delay for each of the forward transmission and the backward transmission.
SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide a method of measuring a transmission delay for a packet flowing through a packet network in which the delay can be measured individually for each of forward transmission and backward transmission without requiring clock synchronization.
It is another object of this invention to provide a recording medium which stores an application program for implementing the above-mentioned method.
According to this invention, there is provided a method of measuring a transmission delay in a packet network, comprising the steps of (a) detecting, for each of a plurality of data packets transmitted and received between first and second terminals through the packet network, input and output time instants when the data packet enters and leaves the packet network, respectively, by the use of first and second clocks independent from each other and recording the input and the output time instants as recorded input and recorded output time instants; (b) calculating, for each data packet transmitted from the first terminal to the second terminal in a first direction, a difference between the recorded output and the recorded input time instants as a first-direction provisional delay and calculating, for each data packet transmitted from the second terminal to the first terminal in a second direction, a difference between the recorded output and the recorded input time instants as a second-direction provisional delay; and (c) deriving a time difference between the first and the second clocks from minimum values of the first-direction and thie second-direction provisional delays.
The method of this invention may further comprise the step of (d) correcting the first-direction and the second-direction provisional delays by the use of the time difference derived as mentioned above.
The step (a) of detecting and recording the input and the output time instants may be carried out by the first and the second terminals themselves, by packet monitoring terminals for capturing, at an inlet and an
Hasei Shinji
Nakazawa Yoshinao
Seki Yoshinaga
Tanabe Yoshiharu
Tanno Hidekazu
Bayard Djenane
Dharia Rupal
Foley & Lardner LLP
NEC Corporation
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