Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2000-07-13
2001-06-19
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
C438S624000, C438S763000, C438S712000, C324S754090
Reexamination Certificate
active
06248603
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor chips and their fabrication and, more particularly to improving the speed and accuracy of measuring dielectric layers within a semiconductor device or structure.
BACKGROUND OF THE INVENTION
The semiconductor industry has recently experienced technological advances that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of hundreds of millions of instructions per second to be packaged in relatively small, air-cooled semiconductor device packages.
Many of these semiconductor devices are now affected by conditions brought about by their small size and density on the substrate. With respect to poly-emitter devices and gate oxide transistors, the thickness of the oxide layer is crucial to the speed and performance of the device. Therefore, measuring the thickness of the oxide or dielectric layers on a regular basis is important in monitoring the performance of the wafer processing line. In addition, due to wafer processing anomalies an interfacial oxide layer is sometimes formed through oxidation between the silicon substrate and a polycrystalline layer being deposited on the substrate. This increases the effective thickness of the dielectric layer of the transistor, which affects the device's speed and performance. Even though TEM (transmission electron microscopy) is currently the tool of choice to image cross sections of the thin oxide layers, lengthy sample preparation time required by TEM as well increasingly lower levels of resolution achieved by TEM (as oxide layer thickness decrease by virtue of current wafer processing techniques) is quickly forcing chip designers to look for other alternatives in measuring dielectric layers in integrated circuit devices.
SUMMARY OF THE INVENTION
The present invention is directed to addressing the above and other needs in connection with improving the ability to analyze and measure semiconductor dielectric layers and their thickness using SIMS (Secondary Ions Mass Spectrometry). The thickness regimes for poly-emitter devices (0.1 nm) and for thin gate oxide transistors (1.5 nm-2.5 nm) are too thin to allow for accurate measurement by electron microscopic techniques. It has been discovered that SIMS could be used to determine interlayer silicon dioxide thickness as well as small differences in thickness from wafer to wafer (or across a single wafer) with greater precision than currently available techniques.
According to one aspect of the invention, a method of measuring the thickness of a dielectric material layer of a semiconductor structure formed on a substrate includes directing a high energy ion beam at a portion of the substrate and sputtering off a plurality of targeted ions from the substrate. The thickness of the dielectric material layer is then determined as a function of a dosage level of the targeted ion and a density of the targeted ion in the dielectric material. In a related embodiment, the method further includes detecting a concentration level of the targeted sputtered ions as they are sputtered off the substrate as well as determining a targeted ion concentration level as a function of the depth of an aperture formed in the dielectric material layer by the ion beam.
According to another aspect of the invention, a system for measuring the thickness of a dielectric material layer of a semiconductor structure formed on a substrate includes a high energy ion beam arrangement directed at a portion of the substrate that sputters off a plurality of targeted ions from the substrate. The system further includes an arrangement for determining the thickness of the dielectric material layer as a function of a dosage level of the targeted ion and a density of the targeted ion in the dielectric material. In a related embodiment, the system further includes an arrangement for determining the targeted ion dosage and for determining the density of the targeted ion in the dielectric material. In addition, the system includes an arrangement for correlating the targeted ion dosage and targeted ion density to arrive at the thickness of the dielectric material layer.
According to yet another aspect of the invention, a method and system for calibrating at least a portion of a wafer processing line, the wafer processing line having at least one processing location and at least one processing parameter, includes measuring a dielectric material layer of a semiconductor structure formed on a substrate. The method further includes directing a high-energy ion beam at a portion of the substrate and sputtering off a plurality of targeted ions from the substrate. The thickness of the dielectric material layer is then determined as a function of a dosage level of the targeted ion and a density of the targeted ion in the dielectric material. Finally, the at least one processing parameter is adjusted where it is determined that the dielectric material layer thickness is not within a predefined thickness range.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description that follow more particularly exemplify these embodiments.
REFERENCES:
patent: 6020746 (2000-02-01), Livengood
patent: 6121060 (2000-09-01), Kameyama
patent: 6153537 (2000-11-01), Bacchetta et al.
patent: 6162735 (2000-12-01), Zimmerman et al.
patent: 6174797 (2001-01-01), Bao et al.
patent: 0123456 A2 (2000-01-01), None
Jones Clive Martin
Zhao Jin
Advanced Micro Devices
Crawford PLLC
Luk Olivia
Niebling John F.
LandOfFree
Method of measuring dielectric layer thickness using SIMS does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of measuring dielectric layer thickness using SIMS, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of measuring dielectric layer thickness using SIMS will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2442066