Method of measuring crystal defects in thin Si/SiGe bilayers

Details Method of measuring crystal defects in thin Si/SiGe bilayers Method of measuring crystal defects in thin Si/SiGe bilayers

2003-09-03

2004-10-12

Mulpuri, Savitri (Department: 2812)

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Electrical characteristic sensed

C438S014000, C438S689000, C438S749000

Reexamination Certificate

active

06803240

ABSTRACT:

DESCRIPTION
1. Field of the Invention
The present invention relates to semiconductor device manufacturing, and more particularly to a method of determining crystal defects in a Si layer formed on a SiGe alloy layer. The method described herein is applicable to Si/SiGe bilayers formed atop bulk Si substrates as well as silicon-on-insulator (SOI)-based substrates. The method of the present invention can be used for measuring the defect density in strained Si layers grown on relaxed SiGe layers as well as any other Si/SiGe film system.
2. Background of the Invention
An important tool for the development and evaluation of high-quality Si/SiGe bilayers is a reliable method of determining the density of defects within the layers. The term “Si/SiGe bilayer” is used throughout the present application to describe a structure having a Si layer located atop a SiGe layer. In particular, accurate determination of the crystal defect density within a thin strained Si layer over a relaxed SiGe layer is important both in terms of strained Si material development as well as evaluation of existing strained Si materials. Current methods used to quantify the density of crystal defects include, for example, electron microscopy and chemical etching.
Electron microscopy can be used to measure defect densities (and character) reliably. Plan-view transmission electron microscopy (PV-TEM) can be used to measure defect densities down to approximately 10
6
to 10
5
defects per square centimeter. Because of the small imaging area, however, lower defect densities cannot be measured reliably using this technique. Other prohibitive elements of PV-TEM analysis are the long and cumbersome sample preparation, the need for expensive electron microscopic equipment and qualified personnel to operate the tool.
In chemical defect etching, the surface of the crystal is continually removed by an etchant that has a higher etch rate at, or near, the crystal defects compared to non-defective regions. The result is the development of surface steps or etch pits that can be examined under a microscope to determine the defect density. This prior art method relies on 1) a difference in the etch rate of defective versus non-defective regions, and 2) removal of enough material to create surface steps with sufficient contrast to be observed under a microscope. Items 1) and 2) mentioned above are related in the sense that if the etch rate difference is large; less material can be removed to obtain the same surface contrast.
A prior art chemical defect etching method that is used to evaluate silicon-on-insulator (SOI) substrates is one that uses a dilute Secco (F. Secco d'Aragona, J. Electrochem. Soc., vol. 119 no. 7 1972 p.948) defect etchant—the Secco etchant is a mixture of potassium dichromate, hydrofluoric (HF) acid and distilled water. The defect etchant is used to thin the SOI layer down to a few hundred angstroms thick (from 500 Å or thicker) and create surface pits that reach the buried oxide layer. Subsequent soaking in hydrofluoric acid leaves the SOI layer intact, but goes through the etch pits and aggressively attacks the buried oxide in that region. The result is a method which ‘decorates’ the etch pits by undercutting the buried oxide enough to be visible with a microscope.
The problem with chemical defect etching of SiGe-based materials is that the defect etch selectivity is very poor (defect etch rate vs. material etch rate) for most available etchants such as Secco, Shimmel (D. G. Shimmel, J. Electrochem. Soc., vol. 126 no. 3 1979 p. 479), etc. Most oxidation-based etchants etch SiGe much faster than Si, and the etch rate increases with increasing Ge content. Because of this reduced defect selectivity within SiGe, the prior art defect etching techniques are unreliable, especially for the case of ultra-thin SiGe layers (on the order of about 100 nm or less).
In view of the problems associated with prior art techniques that employ electron microscopy or the lack of reliable chemical etching techniques to determine the defect density in a Si/SiGe bilayer, there is a need for providing a new and improved method for delineating crystal defects in Si/SiGe bilayers.
SUMMARY OF THE INVENTION
The present invention relates to a method for delineating crystal defects in a Si layer formed over a SiGe alloy layer. The inventive method first employs a defect etchant with a high-defect selectivity in Si. The Si is etched down to a thickness that allows for the formation of defect pits, which contact the underlying SiGe layer. A second etchant, which can be the same or different from the defect etchant, is then employed which attacks the SiGe layer under the defect pits while leaving the overlying Si layer intact. In some embodiments, the first defect etchant itself can act simultaneously as the SiGe decoration as well. The method of the present invention can be used to measure crystalline defect densities of arbitrary magnitude quantitatively and accurately.
The method of the present invention can be used to measure crystal defects in strained Si layers grown on relaxed SiGe layers as well as any other Si/SiGe film system. The Si/SiGe bilayer may be located atop a Si substrate (or wafer) or a silicon-on-insulator (SOI)-based substrate. The method can be used to measure crystalline defects in a Si/SiGe bilayer in which the Si layer is a strained layer having a thickness on the order of about 100 nm or less and the SiGe layer is a relaxed layer having a thickness of from about 10000 nm or less. The method of the present invention works with other thickness ranges besides the aforementioned ranges.
In broad terms, the present invention provides a method for delineating, i.e., determining, the crystal defects in a Si layer located atop a SiGe layer which comprises the steps of:
first etching a structure including a Si layer located on a SiGe alloy layer with a defect etchant that is defect selective in Si to form at least one pit defect in the Si layer that is in contact with the SiGe alloy layer, and
second etching the structure containing the at least one pit defect with the same or different etchant as the first etching such that the second etching undercuts the SiGe layer beneath the at least one pit defect.
In accordance with the present invention, the first etching step uses a defect etchant that etches defects, such as dislocation and stacking faults, very quickly in Si, whereas the non-defective Si etches more slowly.
In the embodiment in which the same etchant is used in the second etching step, the SiGe layer is quickly attacked and undercutting occurs. This embodiment of the present invention may be referred to as a “self-decorating” since the etchant used in forming the pit defect in the Si layer is also used to undercut the SiGe layer.
In another embodiment of the present invention, the second etching step is performed utilizing an etchant that is different from the defect etchant used in forming the pit defects in the Si layer. In this embodiment of the present invention, an etchant that etches SiGe faster than Si is employed. That is, an etchant that is highly selective to Si is employed in this embodiment of the present invention.
After performing the first and second etching steps, the etched structure is scanned under an optical microscope to identify the region (or regions) where the defect pits have been undercut. The number of etch pits that have been undercut are then determined within a given region and the defect density is reported as the number of these undercut defects divided by the area, in cm
2
, of the analyzed region.


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