Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2002-05-06
2004-06-15
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S068000, C438S114000, C438S460000, C438S461000, C438S462000
Reexamination Certificate
active
06750083
ABSTRACT:
TECHNICAL FIELD
This invention relates to the molding and application of protective caps to microelectronic semiconductor chips on a wafer scale as opposed to application on an individual chip basis. More particularly the invention relates to an assembly for the molding and application of protective caps to semiconductor chips incorporating Micro Electro Mechanical Systems (MEMS). However the invention is not limited to MEMS applications.
BACKGROUND ART
Semiconductor chips are normally packaged in a protective layer or layers to protect the chip and its wire bonds from atmospheric and mechanical damage. Existing packaging systems typically use epoxy molding and thermal curing to create a solid protective layer around the chip. This is normally carried out on individually diced chips bonded to lead frames and so must be done many times for each wafer. Alternative methods of packaging include hermetically sealed metal or ceramic packages, and array packages such as ball grid array (BGA) and pin grid array (PGA) packages. Recently wafer scale packaging (WSP) has started to be used. This is carried out at the wafer stage before the chips are separated. The use of molding and curing techniques subjects the wafer to both mechanical and thermal stresses. In addition the protective cap so formed is a solid piece of material and so cannot be used for MEMS devices, since the MEMS device would be rendered inoperable by the polymer material. Existing packaging systems for MEMS devices include thematically sealed packages for individual devices, or use silicon or glass wafer scale packaging, both of which are relatively high cost operation.
DISCLOSURE OF THE INVENTION
In one broad form the invention provides a method including:
a) providing a wafer having a plurality of microfabricated devices formed thereon;
b) applying a plurality of substantially hollow caps to a first side of the wafer, the caps positioned such that, in plan view, each cap overlays part or all of at least one microfabricated device and whereby the periphery of each cap is remote from the periphery of any adjacent cap;
c) applying one or more etches to the wafer from the first side toward the other side to etch away at least some of the wafer material between the peripheries of said caps to separate the wafer into separate units.
Preferably the first side is the bottom side of the wafer.
Caps may be applied to both sides of the wafer
A first plurality of caps may be applied to the bottom side of the wafer and a second plurality of caps may be applied to the top side of the wafer. Preferably, in plan view, each of the second plurality of caps overlays all or part of one or more microfabricated devices.
The caps may be joined together by a thin layer of material extending between the periphery of each of the caps when the caps are applied to the wafer.
Where the caps are joined together by a thin layer of material extending between the periphery of each of the caps, the thin layer may be removed by an oxygen plasma etch after step b) and prior to step c).
REFERENCES:
patent: 6555417 (2003-04-01), Spooner et al.
Le Dung A.
Silverbrook Research Pty Ltd
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