Method of manufacturing wiring substrate

Etching a substrate: processes – Forming or treating electrical conductor article – Forming or treating of groove or through hole

Reexamination Certificate

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Details

C216S039000, C216S105000, C438S700000, C438S754000

Reexamination Certificate

active

08052882

ABSTRACT:
A method of manufacturing a wiring substrate of the present invention, includes the steps of forming a seed layer on an underlying layer, forming a plating resist in which an opening portion is provided on the seed layer, forming a copper plating layer in the opening portion by an electroplating, removing the plating resist, wet-etching the seed layer using the copper plating layer as a mask to obtain the wiring layer, roughening a surface of the wiring layer by a blackening process, and forming an insulating layer on the wiring layer, wherein a surface of the copper plating layer is soft-etched simultaneously in the step of etching the seed layer, whereby a soft etching step of the wiring layer carried out prior to the step of the blackening process is omitted.

REFERENCES:
patent: 5800722 (1998-09-01), Tsuyoshi et al.
patent: 5802714 (1998-09-01), Kobayashi et al.
patent: 6780751 (2004-08-01), Fay
patent: 7246435 (2007-07-01), Okamoto et al.
patent: 7420130 (2008-09-01), Okamoto et al.
patent: 7696613 (2010-04-01), Nakamura et al.
patent: 2002/0131247 (2002-09-01), Cooray
patent: 2003/0124832 (2003-07-01), Tseng et al.
patent: 2004/0040148 (2004-03-01), DeMaso et al.
patent: 2004/0072416 (2004-04-01), Fay
patent: 2004/0238209 (2004-12-01), Yuri et al.
patent: 2005/0279253 (2005-12-01), Nakamura et al.
patent: 2006/0016553 (2006-01-01), Watanabe
patent: 2006/0121719 (2006-06-01), Nakamura et al.
patent: 2006/0163740 (2006-07-01), Ohno et al.
patent: 2006/0175084 (2006-08-01), Okamoto et al.
patent: 2006/0292435 (2006-12-01), Liu et al.
patent: 2007/0057363 (2007-03-01), Nakamura et al.
patent: 2007/0114203 (2007-05-01), Kang
patent: 2007/0126030 (2007-06-01), Ito
patent: 2007/0240901 (2007-10-01), Okamoto et al.
patent: 2007/0257356 (2007-11-01), Abe et al.
patent: 2008/0142976 (2008-06-01), Kawano
patent: 2008/0189943 (2008-08-01), Hirose et al.
patent: 2008/0190657 (2008-08-01), Kanetaka et al.
patent: 2008/0268209 (2008-10-01), Woo et al.
patent: 2008/0283282 (2008-11-01), Kawasaki et al.
patent: 2009/0095514 (2009-04-01), Kaneko
patent: 2009/0101510 (2009-04-01), Kang
patent: 2009/0188703 (2009-07-01), Ito et al.
patent: 2009/0238956 (2009-09-01), Kojima
patent: 2009/0269704 (2009-10-01), Hodono
patent: 2009/0283497 (2009-11-01), Kondo
patent: 2009/0288870 (2009-11-01), Kondo et al.
patent: 2009/0297096 (2009-12-01), Hodono
patent: 2010/0000771 (2010-01-01), Shimauchi et al.
patent: 2010/0044085 (2010-02-01), Nakamura
patent: 2010/0065322 (2010-03-01), Ogawa et al.
patent: 2010/0104246 (2010-04-01), Hodono
patent: 2010/0129036 (2010-05-01), Hodono
patent: 2010/0233476 (2010-09-01), Uchida et al.
patent: 2011/0036625 (2011-02-01), Narahashi et al.
patent: 2-238942 (1990-09-01), None
patent: 2003-8199 (2003-01-01), None

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