Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1995-05-31
2000-02-22
Fourson, George
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438437, 438702, H01L 21762
Patent
active
060279834
ABSTRACT:
A method of manufacturing a semiconductor integrated circuit device according to this invention, comprises a step of forming in a semiconductor substrate a deep groove for trench isolation with an aspect ratio of greater than 1, a step of burying a first insulating film in the deep groove in such a way that a shallow groove with an aspect ratio of not greater than 1 remains, and a step of depositing a second insulating film over the semiconductor substrate and then removing the upper portion of the second insulating film to planarize the upper surface of the second insulating film buried in the shallow groove in such a way that the upper surface of the second insulating film is almost flush with the surface surrounding the shallow groove.
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Wolf, S., "Silicon Processing for the VLSI Era, vol. 2, Process Integration", Lattice Press, 1990, pp. 71-72.
Hashimoto Takashi
Kikuchi Toshiyuki
Ohnishi Yoshifumi
Fourson George
Hitachi , Ltd.
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