Method of manufacturing transistor array

Details Method of manufacturing transistor array Method of manufacturing transistor array

1997-11-26

2000-05-30

Dutton, Brian

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Including integrally formed optical element

438158, H01L 2100, H01L 2184

Patent

active

060690194

ABSTRACT:
According to the present invention, a gate insulation film, a silicon film and silicon nitride film are laminated on a gate backing pad made of a gate metal film, and etching is carried out on the silicon nitride film such that it remains on the gate backing pad as a protective insulation film. Thus, the corrosion of the gate backing pad, which is caused as the etching solution penetrate the silicon film in defect, can be prevented. Further, a protective semiconductor layer formed by patterning the protective insulation film and the silicon film, is formed above the gate backing pad. Thus, the gate backing pad can be protected from the etching solution during the patterning of the pixel electrode made of ITO. Therefore, the disconnection of the gate backing pad can be prevented.

REFERENCES:
patent: 5334859 (1994-08-01), Matsuda

Affiliated with

Also associated with

Rating

Method of manufacturing transistor array does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing transistor array, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing transistor array will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1909394