Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2001-06-19
2003-11-18
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S347000, C438S149000
Reexamination Certificate
active
06649933
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin film transistor and the manufacturing method thereof, and more particularly to a thin film transistor used in a thin film transistor liquid crystal display.
2. Description of the Related Art
In an active matrix liquid crystal displays, a thin film transistor (TFT) is commonly adopted for good driving and switching capabilities.
FIG. 1
shows the essential components of a TFT used in a thin film transistor liquid crystal display (TFT-LCD). The substrate
1
is made from glass or quartz. A metal layer
2
a
is used as the gate electrode of the TFT. The electrode
2
b
is an electrode of a storage capacitor. A insulating layer
3
is formed on the substrate
1
. A semiconductor layer
4
is further formed above the insulating layer
3
and usually made from amorphous silicon. An n type doped polysilicon layer
5
and a metal electrode
6
are used to form source/drain electrodes of the TFT. A passivation layer
7
is formed above the substrate
1
. A transparent conductive layer
8
, such as an ITO layer, is used to form the pixel electrode. Between the source electrode and the drain electrode, a channel
9
is defined.
According to the TFT shown in
FIG. 1
, the amorphous silicon layer
4
is formed on the insulating layer
3
, and the channel
9
is defined by etching the amorphous silicon layer
4
. During the above etching process, if any amorphous silicon is left above the insulating layer
3
at the position outside the TFT, it will harm the properties of the TFT and reduce the quality of the TFT-LCD. Additionally, two dielectric layers, including the insulating layer
3
and the passivaton layer
7
, are formed on the substrate
1
and will reduce the transmittance of the substrate
1
.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for forming a thin film transistor liquid crystal display (TFT-LCD) using metallic electrodes as a mask to remove the unwanted amorphous silicon layer when forming the source/drain electrodes. This method avoids the problems resulting from unwanted amorphous silicon layer, and enhances the TFT quality.
Another object of the present invention is to provide a manufacturing method for forming a thin film transistor liquid crystal display (TFT-LCD) to efficiently reduce the thickness of the insulating layer by controlling the etching condition for forming the drain/source electrodes without affecting the quality of the TFT. It also increases the capacitance Cs of the storage capacitor by reducing the thickness of the insulating layer.
Yet another object of the present invention is to provide a method for forming a thin film transistor liquid crystal display (TFT-LCD) to define a shielding metal layer above a lower electrode of a storage capacitor. After the drain/source electrodes are patterned, a number of layers are formed between the lower electrode and the shielding metal layer for increasing the storage capacitor.
To achieve the objects described, the present invention provides a first method for forming a thin film transistor liquid crystal display (TFT-LCD). The TFT-LCD has at least one thin film transistor (TFT) and one storage capacitor. The manufacturing process is described below. First, a substrate is provided, a first and a second conductive layer are then deposited on the substrate to respectively form a gate electrode of the TFT and a bottom electrode of the storage capacitor. Then, forming an insulating layer above these conductive layers and the substrate. Further, sequentially forming a semiconductor layer and a doped silicon layer on the insulating layer, then depositing a sacrifice layer with an island shape on the doped silicon layer, especially directly above the first conductive layer. A metal layer is formed covering the island-shaped sacrifice layer and the doped silicon layer, the metal layer is then patterned to form source and drain electrodes above the first conductive layer. A channel is defined between the source electrode and the drain electrode, and the sacrifice layer is exposed in the channel. A portion of the substrate not covered by the source electrode, the drain electrode, and the channel is defined as a non-TFT region so as to expose the doped silicon in the non-TFT region. By using the source and the drain electrodes as a mask, several etching processes are performed at the same time during: (a) the island-shaped sacrifice layer and the doped silicon layer in the channel are removed so that the semiconductor layer is exposed in the channel; and (b) the doped silicon layer and the semiconductor layer on the non-TFT region are removed so that the insulating layer is exposed in the non-TFT region. Finally, a passivation layer is formed to cover the source electrode, the drain electrode, the channel, and the substrate.
To achieve the objects described, the present invention provides a second method for forming a thin film transistor liquid crystal display (TFT-LCD). The TFT-LCD has at least one thin film transistor (TFT) and one storage capacitor. The manufacturing process is described below. First, a substrate is provided, a first and a second conductive layer are then deposited on the substrate to form a gate electrode of the TFT and a bottom electrode of the storage capacitor. Then, forming an insulating layer above these conductive layers and the substrate. Further, sequentially forming a semiconductor layer and a doped silicon layer on the insulating layer, then depositing a sacrifice layer with an island shape on the doped silicon layer, especially directly above the first conductive layer. A metal layer is formed covering the island-shaped sacrifice layer and the doped silicon layer, the metal layer is then patterned to form a source electrode and a drain electrode above the first conductive layer, and form a shielding metal layer above the second conductive layer. A channel is defined between the source electrode and the drain electrode, and the sacrifice layer is exposed in the channel. A capacitor region is defined as a portion of the substrate covered by the shielding metal layer. A portion of the substrate not covered by the source electrode, the drain electrode, the capacitor, and the channel is defined as a non-TFT region so as to expose the doped silicon in the non-TFT region. By using the source electrode, the drain electrode, and the shielding metal layer as a mask, several etching processes are performed at the same time during: (a) the island-shaped sacrifice layer and the doped silicon layer in the channel are removed so that the semiconductor layer is exposed in the channel; and (b) the doped silicon layer and the semiconductor layer on the non-TFT region are removed so that the insulating layer is exposed. Finally, a passivation layer is formed to cover the source electrode, the drain electrode, the channel, and the capacitor region.
To achieve the objects described, the present invention provides a third method for forming a thin film transistor liquid crystal display (TFT-LCD). The third manufacturing method is similar to the first manufacturing method. The major difference between the third method and the first method is the position of the sacrifice layer. In the third method, the island-shaped sacrifice layer is formed on the semiconductor layer, and the doped silicon layer is formed above the sacrifice layer in the channel.
To achieve the objects described, the present invention provides a fourth method for forming a thin film transistor liquid crystal display (TFT-LCD). The fourth manufacturing method is similar to the second manufacturing method. The major difference between the fourth method and the second method is the position of the sacrifice layer. In the fourth method, the island-shaped sacrifice layer is formed on the semiconductor layer, and the doped silicon layer is formed above the sacrifice layer in the channel.
In these methods mentioned above, the etching rates of the island-shaped sacrifice layer, the doped silicon layer, and the semicond
AU Optronics Corp.
Gebremariam Samuel
Ladas & Parry
Loke Steven
LandOfFree
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