Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
1999-12-07
2003-08-12
Picard, Leo (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C712S200000, C716S030000, C716S030000
Reexamination Certificate
active
06606532
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a system large-scale integration (LSI) with a core processor, a memory and a peripheral circuit mounted on a single chip and a system LSI manufactured using the particular method, and, in particular, to a method of manufacturing a flexible system LSI chip (FlexSys) which can reduce both the cost and the power consumption, of the system LSI, at the same time.
With the recent progress of micromachining techniques, a system LSI with a system mounted on a single chip has become possible. The system LSI is configured with hardware and software. In the description that follows, it is assumed that the hardware includes a processor, a data memory, an instruction memory and a peripheral circuit, and the software includes an application program.
For reducing the manufacturing cost of the system LSI, reusability must be improved for both hardware and software. The overhead per chip can be reduced by sharing the process of design and manufacture and increasing the substantial production quantity in each process by the reuse of hardware and software.
In designing a embedded system, a processor-based system design is widely employed. This design, including a processor, has two advantages. One is that the specification can be easily changed even in the final stage of the design process. The second advantage is that the design change can be easily accomplished. In the processor-based system design, the reuse of hardware and software greatly contributes to the cost reduction of the system design.
In the processor-based embedded system design, most of the system functions are realized by software. The functions required of the system are becoming more complicated year by year and therefore the software cost increases. Further, with the shortening of the product life and variation of products, an increasingly heavier load is being imposed on software developers. To reduce the software development cost, many software developers convert the functions to parts and reuse the parts. As one example, a program for realizing widely-used functions such as OS and communication control is reused.
For the system LSI with the system functions integrated on a single chip, on the other hand, the design reuse of hardware as well as software is an indispensable technique. The reuse of hardware can reduce the unit cost of the chip. This is by reason of the fact that the reuse makes possible the mass production and reduces the design cost per unit chip and the mask production cost. An example of hardware reuse intended to reduce the chip unit cost by mass production of devices having different purposes is the reuse of base wafers such as gate arrays and FPGAs (field programmable gate arrays). In these approaches, LSIs of a given type having freedom of design at a transistor or gate level are produced in a great quantity, and their purposes are determined in a stage near to the final process thereby to realize a reduced price of the chip. The introduction of this approach to the system LSI with a processor, a memory and an input/output circuit integrated on a single chip is, however, difficult because of the performance and power overhead.
In view of this, the reuse of hardware widely used now for the embedded system is the reuse of the processor and the memory cores.
The embedded software is increasing in size and it is complicated, and it is necessary to improve the reusability in more versatile ways, for all the architectures. Nevertheless, it is considered difficult to reduce both the cost and the power consumption of the system LSI at the same time. The reason is as follows. Now that the restrictions on the heat generation and the battery life are becoming more and more strict, the system LSI is desirably specialized as far as possible for respective applications. The specialization of the system LSI, on the other hand, reduces the possibility of reuse. Further, in view of the trend toward a shorter product life, the production volume of the system LSI is limited. This increases the chip unit cost. A technique is required, therefore, to allow design of the system LSI for general-purpose applications, as far as possible, to permit reuse.
Japanese Unexamined Patent Publication No. 58-186824, for example, proposes a method in which contacts are formed in a required pattern to cut off power supply to those function blocks, integrated on a single semiconductor chip, which are not used for executing the application program. In the actual system LSI, however, there is substantially no block which is not used at all. Namely, a part of every block operates. The proposed method, therefore, fails to exhibit a sufficient effect.
The reuse of the hardware and software of the system LSI will be discussed in more detail. In the following description, the effect that design reuse has on the chip unit cost will be studied using the chip unit cost of LSI as a model.
Let D be the design cost of the LSI, M be the mask production cost, N the number of LSIs with no fault, and F be the production cost per chip (approximated by the chip area). The unit cost P of the LSI is approximated by equation (1).
P
=(
D+M
)/
N+F
(1)
Equation (1) shows that with the increase in N, i.e. by manufacturing the same LSI in a large volume, the design cost per chip and the mask production cost are reduced. The micro controller is an example. The micro controller, which is designed as a general-purpose device intended for a plurality of applications, is reusable and the chip thereof is low in cost.
Improving the design reusability makes possible mass production of the chips and can reduce the unit cost thereof. Now, the effect that the design reuse has on the chip unit cost will be analyzed. Assume that a total of N system LSIs are designed for k different applications. The chip unit cost will be compared between two designs (a) and (b). In design (a), one system LSI is commonly used for k applications, while in design (b) k system LSIs are designed. Let P′ be the unit cost of the chip designed by the method (a), and Pi be the unit cost of the chip designed by the method (b). Both can be approximated by equations (2) and (3) below.
P
′=(
D′+M
′)/
N+F′
(2)
Pi
=(
Di+Mi
)/
ni+Fi
(3)
The relation between N and ni is expressed by equation (4) below.
∑
i
=
0
k
ni
=
N
(
4
)
Assuming that D′≈Di and M′≈Mi, the figure for the case using a single LSI, i.e. the first term of equation (2) above is much smaller. The manufacturing cost F (F′, Fi) of the second term, on the other hand, is strongly related to the yield rate determined by the chip area. Generally, the specialization reduces the chip area, and therefore the relation F′>Fi holds. In other words, specialization is recommended for reducing the second term.
As one of the methods for solving the above-mentioned problems, a technique of limiting the range of reuse and using a single LSI for a plurality of applications, i.e. a technique of designing one type of LSI for k (k>1) applications is widely used. A small-scale system built into domestic electric appliances and mainly in charge of the control operation thereof, for example, uses a small-scale LSI such as a 4-bit microcomputer, while a portable information terminal involving sophisticated signal processing therein uses a large LSI such as a 32-bit microcomputer.
The current general-purpose microcomputers, however, have the power consumption and the basic performance thereof fixed by the chip and are not easily used for different applications in a versatile way without packaging more than the required circuits or the wasteful use of the silicon area. The range of reuse is limited, and therefore a 4-bit system is not realized in a 32-bit microcomputer, for example. Nevertheless, the problem is posed that unrequired power consumption occurs in each range. In the case where a 32-bit microcomputer is u
Inoue Akihiko
Yasuura Hiroto
Picard Leo
Rodriguez Paul
Semiconductor Technology Academic Research Center
Wallenstein & Wagner Ltd.
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