Method of manufacturing SOI wafer

Details Method of manufacturing SOI wafer Method of manufacturing SOI wafer

2005-01-18

2005-01-18

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

C438S459000, C206S710000, C206S711000, C206S712000, C414S938000

Reexamination Certificate

active

06844242

ABSTRACT:
A boat (4) has a recess (5) for supporting a laminated wafer (50). The recess (5) has a first side surface (5a), a first bottom surface (5b), a second side surface (5c), a second bottom surface (5d) and a third side surface (5e). Viewing from an upper surface of the boat (4), the second bottom surface (5d) is located in a position lower than the first bottom surface (5b). The laminated wafer (50) is mounted on the boat (4) in the state that a side surface of a first silicon wafer (1) is not in contact with the second bottom surface (5d) of the recess (5) and a side surface of a second silicon wafer (2) is in contact with the first bottom surface (5b) of the recess (5). A second main surface (2a) of the second silicon wafer (2) is in contact with the first side surface (5a) of the recess (5) and a second main surface (1a) of the first silicon wafer (1) is in contact with the third side surface (5e) of the recess (5).

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patent: 2000-294526 (2000-10-01), None

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