Method of manufacturing semiconductor substrate and method of ma

Details Method of manufacturing semiconductor substrate and method of ma Method of manufacturing semiconductor substrate and method of ma

1991-05-17

1993-07-13

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437226, 437249, 437946, 156645, 156626, H01L 21302, H01L 21463

Patent

active

052273393

ABSTRACT:
Disclosed is a method of manufacturing a semiconductor wafer or SOI substrate having a total thickness variation (TTV) of 1 micrometer or less which is required to make a future semiconductor integrated circuit of high density. A semiconductor crystal disk made by slicing a semiconductor crystal ingot is flattened by being subjected to a flattening step such as a grinding, chemical-mechanical polishing or the like and then subjected to a step for providing an asymmetric configuration such as an orientation flat (OF) and the like. With this process, the deterioration of flatness due to the presence of the OF and the like can be prevented. Further, a flattening step conventionally carried out by lapping is replaced by surface grinding, by which the flatness of a wafer is improved and an etching step following the lapping can be omitted. The introduction of this process enables semiconductor wafers having a TTV of 1 micrometer or less and a diameter of 6 inches to be obtained at a yield of 90% or more. In addition, the above method can also be applied to an SOI substrate composed of two silicon wafers bonded through an insulating layer to uniformly thin one of the silicon wafers to a few micrometers, whereby the practical use of a semiconductor integrated circuit of a SOI structure will be accelerated.

REFERENCES:
patent: 4638552 (1987-01-01), Shimbo et al.
patent: 5051378 (1991-09-01), Yagi et al.
S. Wolf and R. Tauber, Semiconductor processing for the VLSI era, 1986, pp. xxii-xxiv.
R. C. Frye et al., J. Electrochemical Soc. 133, 1673, 1986.
J. B. Lasky, Appl. Phys. Lett. 48, 78, 1986.

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