Method of manufacturing semiconductor integrated circuit device

Details Method of manufacturing semiconductor integrated circuit device Method of manufacturing semiconductor integrated circuit device

2005-05-31

2005-05-31

Weiss, Howard (Department: 2814)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

With electrical circuit layout

C438S228000, C438S275000

Reexamination Certificate

active

06900081

ABSTRACT:
A semiconductor device has a depletion type MIS transistor, a transistor forming a masked ROM, and a submicron CMOS integrated on a single or common semiconductor substrate, while minimizing the steps of manufacturing the depletion type MIS transistor. During implantation of ions for changing an enhancement type transistor into a depletion type transistor, impurity ions can be implanted to change the transistor forming the masked ROM into resistance, so that the depletion type transistor, the transistor constituting the mark ROM, and a submicron CMOS can be integrated on a single or common semiconductor substrate.

REFERENCES:
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patent: 4972371 (1990-11-01), Komori et al.
patent: 5468983 (1995-11-01), Hirase et al.
patent: 5885874 (1999-03-01), Gardner
patent: 6469347 (2002-10-01), Oda et al.
patent: 6653694 (2003-11-01), Osanai

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