Fishing – trapping – and vermin destroying
Patent
1992-06-10
1994-03-01
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 57, 437193, 437913, H01L 21265
Patent
active
052907171
ABSTRACT:
A method of manufacturing a semiconductor device including a MOS transistor, wherein a second resist pattern having openings respectively defining gate, source, and drain regions is formed while leaving a first resist pattern on a gate material film, i.e., a polycrystalline silicon film, which is used to form a gate electrode. Impurities are implanted into the source and drain regions by using the first and second resist patterns as a mask. The impurities are stopped in the inside of the first resist pattern on the gate and are not implanted into the gate.
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J. Y. C. Sun et al., Study Of Boron Penetration through Thin Oxide With P.sup.+ -Polysilicon Gate, Symposium on VLSI Technology, 1989, pp. 17-18.
Chaudhuri Olik
Kawasaki Steel Corporation
Tsai H. Jey
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