Fishing – trapping – and vermin destroying
Patent
1990-08-22
1993-02-16
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437228, H01L 2144
Patent
active
051871181
ABSTRACT:
In a method of manufacturing semiconductor devices by using a semiconductor wafer having a circuit area in which a circuit pattern is to be formed and a character printing area in which a lot number pattern for recording characters used for product management is to be formed, etching the surface of the semiconductor wafer to form the lot number pattern in the character printing area, forming a metallic layer over the surface of the semiconductor wafer, and selectively removing the portion of the metallic layer located on the circuit area but not used as the circuit pattern and the portion of the metallic layer located on the character printing area simultaneously.
REFERENCES:
patent: 4896034 (1990-01-01), Kiriseko
patent: 4930086 (1990-05-01), Fukasawa
Midou Youichi
Ohmori Masashi
Hearn Brian E.
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Tuan
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