Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Patent
1995-06-07
1996-10-01
Prenty, Mark V.
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
257431, 257565, 257577, H01L 23544
Patent
active
055613179
ABSTRACT:
Disclosed is a method of manufacturing semiconductor devices in which a desired pattern having an area size larger than the field size that can be obtained in one exposure process step of an exposure device is formed. The manufacturing method includes the steps of dividing the desired pattern into a plurality of portions, and conducting exposure on the dividing patterns in a joined fashion.
Momma Genzo
Yuzurihara Hiroshi
Canon Kabushiki Kaisha
Prenty Mark V.
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