Method of manufacturing semiconductor devices

Details Method of manufacturing semiconductor devices Method of manufacturing semiconductor devices

1992-11-12

1994-10-25

Gorgos, Kathryn

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Coating selected area

437189, 437192, 437190, 437195, 20419217, 20419225, C25D 502, C25D 510

Patent

active

053586212

ABSTRACT:
In a semiconductor device having multi-layer lead conductors, lead conductors of each layer and through connections are generated by electro chemical plating process. A flat and smooth surface is provided for each layer on which lead conductor base patterns are formed. Plating lead conductors on a layer and plating through connections are executed in a separate process. And, in these platings, electrolytic current is so controlled that the growth of plating is always from the base of the plating.

REFERENCES:
patent: 5104820 (1992-04-01), Go et al.
Haberle, et al., "Multilevel Gold Metallization" V-MIC Conf., Jun. 13-14, 1988, pp. 117-124.
Sumers, Doug, "A Process For Two-Layer Gold IC Metallization", Solid State Technology, Dec. 1983.

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