Fishing – trapping – and vermin destroying
Patent
1993-11-24
1995-12-26
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
437 70, 437154, 437931, H01L 21266
Patent
active
054787599
ABSTRACT:
A thick isolation oxide film is selectively formed on a surface of a silicon substrate so as to isolate an element formation region. Ions are implanted into a region in silicon substrate through the thick isolation oxide film. Thus, retrograde wells, having impurity concentration peak positions are formed in the region of silicon substrate positioned under the isolation oxide film. Then, an upper part of the isolation oxide film is removed away to form an isolation oxide film with a reduced thickness. Isolation oxide film has a reduced isolation length L. Thus, a semiconductor device is provided, which permits restriction of the narrow channel effect and the substrate biasing effect when the size of elements is reduced.
REFERENCES:
patent: 4633289 (1986-12-01), Chen
patent: 4732869 (1988-03-01), van Attekum et al.
patent: 5004701 (1991-04-01), Motokawa
patent: 5061654 (1991-10-01), Shimizu et al.
patent: 5138420 (1993-08-01), Komori et al.
patent: 5160996 (1992-11-01), Odanaka
patent: 5292671 (1994-03-01), Odanaka
Ghandhi, S. K., "VLSI Fabrication Principles--Silicon and Gallium Arsenide", 1983, pp. 348-352, 422-423.
John Yuan-Tai Chen: Quadruple-Well CMOS for VLSI Technology; US period.: IEEE Transactions on Electron Devices, vol. ED-31, No. 7, Jul. 1984, pp. 910 to 919.
Odanaka, S., Yabu, T., Shimizu, N. et al.: A Self-Aligned Retrograde Twin-Well Structure with Buried p.sup.+ -Layer, US period.: IEEE Electron Device Letters, vol. 10, No. 6, Jun. 1989, pp. 280 to 282.
Hans P. Zappe, et al., "Characteristics of CMOS Devices in High-Energy Boron-Implanted Substrates", IEEE Transactions on Electron Devices, vol. 35, No. 7 (Jul. 1988), pp. 1029-1934.
Tomoshisa Mizuno, et al., "Oxidation Rate Reduction in the Submicrometer LOCOS Process", IEEE Transactions on Electron Devices, vol. ED-34, No. 11 (Nov. 1987), pp. 2255-2259.
Maruzen Kbushiki Kaisha, "Electric Material Series Submicron Device I", pp. 4-8. (no date).
Arai Hajime
Kobayashi Heiji
Mametani Tomoharu
Shimizu Masahiro
Tsukamoto Katsuhiro
Chaudhari Chandra
Mitsubishi Denki & Kabushiki Kaisha
LandOfFree
Method of manufacturing semiconductor device with retrograde wel does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor device with retrograde wel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device with retrograde wel will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1368759