Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1982-12-16
1984-12-11
Hearn, Brian E.
Metal working
Method of mechanical manufacture
Assembling or joining
29591, 357 71, 357 72, 357 73, 174 52PE, 174 52FP, H01L 2128, H01L 2144, H01L 2328, H01L 2940
Patent
active
044869452
DESCRIPTION:
BRIEF SUMMARY
DESCRIPTION
1. Technical Field
This invention relates to a resin-molded semiconductor device used for electric circuits, and more particularly, to a semiconductor device with plated bumps having a sealing structure which can prevent an external environment atmosphere from invading through the contact surfaces with a resin mold at the lead drawing out portions thereof.
2. Background Art
In the field of semiconductor devices, according to a well known prior method for drawing out leads from active and passive elements in a semiconductor chip to the exterior, aluminium is first evaporated on the surface of the chip to form internal wiring and bonding regions. Each such lead such as a wire, is bonded to a lead frame or a circuit substrate by ultrasonic bonding, thermo compression bonding or other techniques, and then a resin mold is formed around the chip to enclose and complete the semiconductor device.
More specifically, when manufacturing a DIP type resin-molded semiconductor device as shown in FIG. 1, an oxide film 4 is formed on a semiconductor chip 1 with a collector region 12 and a base region 3. An aluminium layer 5 is applied thereon to form internal wiring and bonding regions, as shown in FIG. 3. Then, a passivation film 6 is coated thereover to protect the overall surface, except for the aluminium bonding regions. That portion of the aluminium layer 5 serving as bonding pads is connected to a lead frame 8 or to a circuit substrate using drawing out leads such as a wire 7. A resin mold 9 is formed around the chip to obtain the complete semiconductor device.
In a semiconductor device arranged as above, however, the aluminium bonding pad 5 to which the drawing out lead such as the wire 7 is connected has size of 80.about.150 .mu.m square, while the wire 7 has a thickness of 25.about.30 .mu.m in diameter. Therefore, the semiconductor device is sealed by the resin mold 9 such that the aluminium surface of the pad 5 is exposed, at least at positions other than the connected portion of the wire 7 to the aluminium bonding pad 5. In this manner, even if the lead frame 8, wire 7 and semiconductor chip 1 have been sealed by the resin mold 9, there will appear gaps with age at the sealing contact surface with the resin depending on environmental conditions such as temperature, moisture or various gases, to which the semiconductor device will be subjected, thereby resulting in a partially unsealed state. When moisture or various gases enter along the lead frame 8 and wire 7 from these gaps and reach the aluminium bonding pad 5, "purple plague" phenomenon will occur in the bonding pad where the aluminium surface is exposed, and this may cause breaking of the semiconductor device. Furthermore, another drawback also has been experienced such that although the surface of the semiconductor chip 1 is protected by the passivation film 6, for example an oxide film, phosphorous glass film or nitride film, the film itself is very thin and often includes pin holes therein, whereby moisture or gas having entered therethrough causes insulation breakdown on the surface of the semiconductor chip at locations other than at the bonding pad.
It is therefore an object of this invention to provide a method of manufacturing a semiconductor device in which such purple plague phenomenon or insulation breakdown will not occur, and which method can be easily applied.
SUMMARY OF THE INVENTION
A method of manufacturing a semiconductor device with plated bumps according to this invention comprises a first step in which an insulation film with openings at bump formed positions is applied on a semiconductor wafer having aluminium wiring thereon, a second step in which a plating ground metal layer is formed on the insulation film, a third step in which a photo resist layer with openings at bump formed positions is masked over the plating ground metal layer, a fourth step in which an easily bonded metal with drawing out leads such as a wire is plated at bump formed positions on the plating ground metallayer to form bumps, a fifth step in w
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Farber Martin A.
Hearn Brian E.
Hey David A.
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