Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of...
Reexamination Certificate
2000-03-29
2002-01-08
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
C438S337000, C438S341000, C438S348000
Reexamination Certificate
active
06337251
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, more particularly, a method of manufacturing a semiconductor device with no parasitic barrier.
2. Description of the Related Art
The high speed operation of a bipolar transistor is demanded. In a SiGe base bipolar transistor using a SiGe layer as a base layer, boron forms a parasitic barrier in the boundary between a collector and a base to obstruct the high speed operation. When the base layer is formed of a silicon layer, such a problem is not caused. However, when the SiGe layer is used as the base layer, the parasitic barrier is generated.
A technique for restraining the generation of such a parasitic barrier is known in Japanese Laid Open Patent Application (JP-A-Heisei 10-79394). According to this conventional technique, as shown in
FIG. 1A
, an oxide film
2
is formed on a silicon substrate
1
. A boron doped polysilicon film
3
is formed on the oxide film
2
. An insulating film
4
is formed on the polysilicon film
3
. Subsequently, an emitter contact opening
5
is formed in the insulating film
4
, the boron doped polysilicon film
3
, and the oxide film
2
. Then, an oxide film
2
is further removed to the lateral direction by a wet etching. After the exposed surface formed in this way is subjected to APM rinse, a high temperature thermal treatment (flashing process) is performed in an epitaxial growth unit to remove impurities from the surface. Thus, the surface
6
of the silicon substrate
1
is cleaned.
Next, as shown in
FIG. 1B
, a SiGe spacer layer
7
in which boron is not doped is formed on the surface
6
. Then, a boron doped SiGe base layer
8
is formed on the SiGe spacer layer
7
such that the boron doped SiGe base layer
8
is connected to the boron doped polysilicon film
3
.
Next, a wafer is taken out from the epitaxial growth unit. Subsequently, as shown in
FIG. 1C
, after side walls
9
are formed, a polysilicon film
11
is formed on the boron doped SiGe base layer
8
. Thus, an emitter region
18
is formed.
The transistor having the SiGe spacer layer
7
should not have a parasitic barrier theoretically. Therefore, if the cutoff frequency f
T
as the index of an AC characteristic of the bipolar transistor is designed to 60 GHz, the cutoff frequency f
T
should become 60 GHz in accordance with the theory. However, the cutoff frequency f
T
of the actually manufactured bipolar transistor was only 20 GHz.
In conjunction with the above description, a semiconductor device is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 7-147287). In this reference, a bipolar transistor having a base layer and a collector layer which are composed of single crystal silicon containing Ge. The base layer (
10
) has a distribution in which the concentration of Ge is low on the side of the emitter layer (
13
) and is high on the side of the collector layer (
3
A). The collector layer has a distribution in which the concentration of Ge is high on the side of the base layer and is low on the side of the high concentration pad layer
2
inside the collector. Moreover, the Ge concentration in the collector layer decreases rapidly on the side of the base layer and decreases gently on the side of the pad layer. Thus, the drift electric field of the silicon hetero junction bipolar transistor which has the SiGe base and the SiGe collector is improved, the mobility of the carrier in the base layer is improved and the generation of the parasitic barrier is restrained in the base collector junction area.
Also, a semiconductor device is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 8-83805). In this reference, a P-type base electrode polysilicon film (
7
) is formed on a silicon oxide film (
6
) to protrude in an opening (
101
). An undoped single crystal Si
0.9
Ge
0.1
layer (
10
), a P
+
-type single crystal Si
0.9
Ge
0.1
layer (
11
) and an N
+
-type single crystal emitter (
16
) are formed on a silicon collector layer (
3
) in the opening (
101
). Each of the single crystal Si
0.9
Ge
0.1
layer (
10
) and the single crystal Si
0.9
Ge
0.1
layer (
11
) has a trapezoidal section in which the film thickness of a portion situated under the polysilicon film (
7
) is thinner than the film thickness of the other portion. Also, the P
+
-type single crystal silicon layer
12
has the film thickness of a portion situated under the polysilicon (
7
) is thicker than the film thickness of the other portion, and contacts the polysilicon film (
7
) through the polycrystal film (
13
). In this way, the degradation of junction characteristic is restrained.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of manufacturing a semiconductor device in which the generation of a parasitic barrier can be prevented.
In order to achieve an aspect of the present invention, a method of manufacturing a semiconductor device, is attained by forming a first insulating film on a semiconductor substrate, by forming a first conductive film on the first insulating film, by forming a second insulating film on the first conductive film, by forming an opening to the semiconductor substrate through the second insulting film, the first conductive film and the first insulting film to expose a portion of a surface of the semiconductor substrate and a portion of a surface of the first conductive film, by covering the exposed surface portion of the first conductive film by a covering film, by carrying thermal treatment to clean the exposed surface portion of the semiconductor substrate, by forming a spacer film in the opening on the exposed surface portion of the semiconductor substrate, by removing the covering film, and by forming an electrode film on the spacer film.
Here, in order to cover the exposed surface portion of the first conductive film, there may be performed a step of forming third insulating film on the exposed surface portion of the semiconductor substrate, a step of forming a fourth insulating film on the exposed surface portion of the first conductive film, and a step of removing the third insulating film and a part of the fourth insulating film, a remaining portion of the fourth insulating film functioning as the covering film. In this case, the fourth insulating film is thicker than the third insulating film. Also, the exposed surface portion of the semiconductor substrate may be oxidized to form the third insulating film and the exposed surface portion of the first conductive film may be oxidized to form the fourth insulating film. Also, wet etching may be carried out to the third and fourth insulating films. At this time, the third insulating film having an etching rate larger than the fourth insulating film. Thus, the third insulating film and a part of the fourth insulating film may be removed.
Also, the thermal treatment may be carried out at a temperature of 800° C. or above to clean the exposed surface portion of the semiconductor substrate.
Also, the first conductive film may be a boron-doped p-type conductive film, the spacer film may be a SiGe film, and the electrode film may be a boron-doped SiGe base film.
In order to achieve another aspect of the present invention, a method of manufacturing a semiconductor device, is attained by forming an opening to a semiconductor substrate through a first insulting film, and a boron-doped polysilicon film to expose a portion of a surface of the semiconductor substrate and a portion of a surface of the boron-doped emitter film, by forming a non-doped SiGe spacer film in the opening on the exposed surface portion of the semiconductor substrate without contamination by boron emitted from the polysilicon film, and by forming a boron-doped intrinsic base film on the spacer film.
In the step of forming a non-doped SiGe spacer film, the exposed surface portion of the semiconductor substrate is rinsed and thermal treatment is carried out while preventing the emission of boron from the polysilicon film. In this case, the thermal
Malsawma Lex H.
McGinn & Gibb PLLC
NEC Corporation
Smith Matthew
LandOfFree
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