Semiconductor device manufacturing: process – Avalanche diode manufacture
Reexamination Certificate
2001-04-11
2002-08-20
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Avalanche diode manufacture
C438S237000, C438S979000, C257S199000
Reexamination Certificate
active
06436785
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device with a semiconductor diode comprising a silicon semiconductor body with a semiconductor substrate and a first semiconductor region of a first conductivity type which is provided with a first connection conductor and which adjoins a second semiconductor region of a second conductivity type opposed to the first and provided with a second connection conductor, the doping concentrations of both the first and the second semiconductor region being so high that the pn junction between the first and the second semiconductor region forms a tunnelling junction. The invention also relates to a method of manufacturing such a device.
Such a device is known from Physics of Semiconductor Devices, by S. M. Sze, John Wiley & Sons, 1969, pp. 150-151. Such devices are attractive on account of their steep current-voltage characteristic in both the forward and the reverse direction and are quite useful in applications such as microwave amplification and switching at high speed.
A disadvantage of the known device is that the forward characteristic, but in particular the reverse characteristic is not yet steep enough for some applications. It is accordingly an object of the present invention to provide a device with an improved, i.e. steeper forward characteristic and especially with an improved reverse characteristic. The invention also has for its object to provide a simple and reliable method for the manufacture of such improved devices.
SUMMARY OF THE INVENTION
According to the invention, a device of the kind mentioned in the opening paragraph is for this purpose characterized in that the portions of the first and of the second semiconductor region which adjoin the junction comprise a mixed crystal of silicon and germanium. The invention is based first of all on the recognition that a mixed crystal of silicon and germanium has a smaller bandgap than silicon and that a smaller bandgap increases the tunnelling probability, which renders the current-voltage characteristic steeper. The invention is further based on the surprising recognition that a mixed crystal of silicon and germanium makes possible a higher n-doping level as well as a higher p-doping level than in silicon. This is mostly caused at the n-side of the junction by the fact that more dopant atoms, for example, phosphorus atoms, are incorporated into the lattice, and at the p-side this is mostly caused by the fact that the dopant atoms, for example, boron atoms, have a lower mobility, which creates a steeper doping profile with a higher maximum concentration. As a result, the maximum concentration of charge carriers at both sides of the tunnelling junction is greater than in the case of a tunnelling junction in pure silicon. The tunnelling efficiency also increases as a result of this. A device according to the invention is found to have a very steep forward and reverse characteristic, the latter being steeper than the former. This opens perspectives for an attractive application of the device according to the invention in which the tunnelling pn junction is used as a junction between two normal diodes, for example, pn or pin diodes, which are used stacked on one another. Such a stacking may then be manufactured in a single epitaxial growing process instead of through the stacking of discrete, individual diodes provided with contact metallizations. A further important advantage of said steeper current-voltage characteristic is that the dissipation decreases, so that a device according to the invention will have a longer life than the conventional device.
In a preferred embodiment of a device according to the invention, the portions of the first and the second semiconductor region which adjoin the tunnelling junction have a thickness which lies between 5 and 30 nm and a germanium content which lies between 10 and 50 at %. Excellent results were obtained thereby. Thus a device was realized in which said portions are 27 nm thick and comprise 25 weight % germanium, in which case the current density through the tunnelling pn junction is 1 A/cm
2
for 0.3 V and 30 A/cm
2
for 1 V in the forward direction. In the reverse direction, the same measurements even yielded 10 A/cm
2
and 80 A/cm
2
, respectively. The required majority charge carrier concentration is at least approximately 5×10
19
. Preferably, the thickness and the germanium content of said portions are so chosen that the mechanical stress built up as a result of the difference in lattice constant between germanium and silicon does not lead to the creation of fatal dislocations. This means that the product of the total thickness of said portions and the relative difference in lattice constant must be chosen to be smaller than or equal to approx. 30 nm.
A very attractive embodiment of a semiconductor device according to the invention is characterized in that further semiconductor regions are present between the first semiconductor region and the first connection conductor or between the second semiconductor region and the second connection conductor, forming one or several further pn junctions which are forward biased when the tunnelling pn junction is reverse biased and which are separated from one another by two further semiconductor regions having the same properties as the first and the second semiconductor region and forming a further tunnelling pn junction. Such a stacking of diodes is particularly suitable for use as a high-voltage switching diode, where it is determined from the desired total breakdown voltage and the breakdown voltage of each individual diode how great the number of further pn junctions should be. This may be any integer number, for example a number between 1 and 10. Thanks to the tunnelling pn junction present between each pair of further pn junctions, such a stacking of diodes has an excellent current-voltage characteristic. It is very important that the invention renders it acceptable to provide all diodes (including the tunnelling diodes) one after the other in a single epitaxial deposition step. This simplifies the manufacture.
The lowermost and the uppermost semiconductor region of such a stacking then act as the contact regions and have a high doping concentration suitable for this purpose. The breakdown voltage of each individual pn junction may be freely chosen. If a comparatively high breakdown voltage is desired, a further pn junction may comprise an i-region.
Preferably the p-type conductivity type is chosen for the conductivity type of the first semiconductor region. This results in the most abrupt junction, which is very desirable. This phenomenon is due to the tendency of n-type dopants, e.g. P or As, to segregate on the surface.
A method of manufacturing a semiconductor device with a semiconductor diode, whereby a first semiconductor region of a first conductivity type is formed in a silicon semiconductor body having a semiconductor substrate and is provided with a first connection conductor, and a second semiconductor region of a second conductivity type opposed to the first is formed so as to adjoin the first semiconductor region and is provided with a second connection conductor, the doping concentrations of both the first and the second semiconductor region being chosen to be so high that the pn junction between the first and the second semiconductor region forms a tunnelling junction, according to the invention, is characterized in that the portions of the first and of the second semiconductor region which adjoin the junction are formed by a mixed crystal of silicon and germanium. Devices according to the invention are obtained in a simple manner by such a method.
Preferably, further semiconductor regions are formed between the first semiconductor region and the first connection conductor or between the second semiconductor region and the second connection conductor, forming one or several pn junctions which are forward biased when the tunnelling pn junction is reverse biased and which are separated from one another by further semiconductor regions having
Brown Adam R.
De Boer Wiebe B.
Hurkx Godefridus A. M.
Slotboom Jan W.
Biren Steven R.
Fourson George
Pham Thanh V
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