Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1999-12-10
2000-10-31
Quach, T. N.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438613, 438614, 438678, H01L 2450
Patent
active
061401552
ABSTRACT:
A plating tray includes a recessed region in a central portion of an insulating substrate for arranging therein a silicon semiconductor substrate and a metal film arranged to surround the recessed region. The semiconductor substrate is housed in the recessed region. Under this condition, a dry photoresist film containing Na, K, Ca and Cu in amounts smaller than predetermined amounts is formed to cover a metal underlying film. Then, a projecting electrode is formed by electroplating within open portions formed in the resist film. In forming the projecting electrode, the open portion is also formed in that region of the resist film which corresponds to the metal film of the plating plate so as to form a dummy projection electrode simultaneously.
REFERENCES:
patent: 4159222 (1979-06-01), Lebow et al.
patent: 5198385 (1993-03-01), Devitt et al.
patent: 5202151 (1993-04-01), Ushio et al.
patent: 5664325 (1997-09-01), Fukotomi et al.
patent: 5719439 (1998-02-01), Iwasaki et al.
Hiramoto Masami
Kotani Shoichi
Mihara Ichiro
Wakabayashi Takeshi
Casio Computer Co. Ltd.
Quach T. N.
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