Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including isolation structure
Reexamination Certificate
1998-07-24
2001-02-06
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Including isolation structure
C438S637000, C257S513000
Reexamination Certificate
active
06184101
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device, especially to that requiring less number of manufacturing stages.
DESCRIPTION OF THE RELATED ART
Now that modern semiconductor devices achieved high-integration and high-speed operation, in compliance with such situation, there has been proposed a method for electrical separation between semiconductors, in which an element is encircled by trenches having buried dielectric substances therein.
It has been recognized that an increase of parasitic resistance due to the element becoming microscopic, is one of major reasons that the element is being prevented from achieving higher operation speed. Particularly, as a collector pert of a bipolar transistor would normally use a buried layer, a resistance from a drawer part is added, thus resulting in the element being put under great influence of the increase of parasitic resistance.
In order to resolve such shortcomings, there has been proposed a structure which is capable of lowering the resistance by forming a plug electrode by filling conductive film within the trenches, each trench being provided so as to reach a buried collector (buried layer).
FIGS. 1A
,
1
B are sectional views for describing a first prior art example.
FIGS. 1A
,
1
B are arranged in an order of manufacturing stages.
First of all, as illustrated in
FIG. 1A
, an N-type buried layer
2
is formed on a P-type semiconductor substrate
1
so as to grog an N-type epitaxial layer
3
. After a silicon oxide film
4
is formed on the epitaxial layer
3
, portions of the silicon oxide film
4
corresponding to regions where element separating trenches should be formed, are selected to be etched in order to form apertures
5
. Then the portions of the silicon oxide film
4
, where the apertures
5
are formed, are used as masks to form element separating trenches
6
which penetrate through the N-type buried layer
2
.
Next, silicon oxide films
7
are formed inside the element separating trenches
6
, after which BPSG film
8
is grown to fill inside the trenches. After this, the BPSG film
8
on the surface is removed.
Secondly, as shown in
FIG. 1B
, a portion of the silicon oxide film
4
corresponding to a region where a buried layer drawing trench should be formed is selected to be etched so as to form an aperture. Then the portion of the silicon oxide film
4
, where the aperture is formed, is used as a mask to firm a buried layer drawing trench
9
. Next, a polycrystal silicon film
10
including phosphorus is grown to fill the buried layer drawing trench
9
. After this, the polycrystal silicon film on the surface is removed where buried layer drawing plug electrode (
10
) is formed.
Subsequently, although further explanatory illustration ,is omitted, the N-type epitaxial layer
3
, which is surrounded by element separating trenches would have a base region formed thereon, the base region having an emitter region formed thereon, thus providing a bipolar transistor. In addition, there are possible examples in which metal films like tungsten are used instead of the polycrystal silicon film
10
.
In this first prior art example, it is essential that trenches with different depths should be formed separately at the element separating regions and the buried layer drawing region, respectively. Accordingly, in this prior art example, the number of manufacturing stages increases.
Now, as to one option for decreasing the number of manufacturing stages and for simultaneously forming trenches with different depths, there is a disclosure of Japanese Patent Laid-Open Publication No. 5-121537, which will be referred to as a second prior art example.
In the second prior art example, as illustrated in
FIG. 2
, deeper element separating trenches
6
A, and a shallower buried layer drawing trench
9
A are formed simultaneously. In this method, silicon oxide film
4
is formed, after which portions of the silicon oxide film
4
corresponding to regions where element separating trenches and a buried layer drawing trench should be formed, are removed. In this process, the silicon oxide film
4
should be patterned in the manner that a width of the buried layer drawing trench is narrower than that of the element separating trench. Then, as the whole surface is etched simultaneously by an application of ECR plasma etching using a mixture of a SiCl
4
gas and a SF
6
gas, the element separating trenches
6
A with wider widths are formed as deeper than the buried layer drawing trench
9
A. This is due to the fact that a trench width influences an etching rate.
With respect to the trenches formed by the ECR plasma etching using a mixture of a SiCl
4
gas and a SF
6
gas, changes of a trench depth with respect to a trench width are shown in
FIG. 3
, by way of an example.
In the above-described first prior art example, it is essential that trenches with different depths are formed at the element separating regions and the buried layer drawing region, which causes the number of manufacturing stages to increase. Further, for it is required that the element separating regions and the buried layer drawing region should be patterned separately, it is necessary that there are some extra room for adequate position adjustments, which gives a disadvantage that the element is kept from becoming more refined.
On the other hand, it is possible to form trenches with different depths according to the second prior art example, which is disclosed in Japanese Patent Laid-Open Publication No. 5-121537. However, even when the trench depths are set over 5 &mgr;m, the difference between the trench depths and the difference between the trench widths are merely kept almost the same. Accordingly, in order to have the buried layer drawing trench remain within the buried layer, and to have the element separating trenches penetrate through the buried layer so as to maintain a sufficient element separation withstand pressure, the width of the element separating trench should be stretched to become more than a couple &mgr;m wider than the buried layer drawing trench. This will be disadvantageous because the element is prevented from becoming more refined. Besides, in reducing the difference between trench widths, it is impossible to form the element separating trench with a sufficient depth, by which a punch through is easily caused between separate parts of the buried layer. In order to prevent this from happening, at the bottom of the element separating trench, a high density P-type diffusion layer (i.e. a channel stopper layer) should be for led. Thus, a counter inter-substrate capacitance would increase, which prevents the element from achieving a high-speed operation.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to resolve the above-mentioned problems, and to provide a method of manufacturing a semiconductor device in which the forming stages of a sigh-speed, high-density bipolar transistor are cut down.
According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising the steps of: simultaneously forming a first trench with a predetermined aperture width and a second trench with an aperture width wider than the first trench, by an application of a lithography; after forming a first insulating film only on inner sides of the first and the second trenches, piling up a conductive layer such that the first trench would be filled and that the second trench would have a concave part formed therein; exposing the semiconductor substrate only at a bottom part of the second trench; and etching the semiconductor substrate being exposed at the bottom part of the second trench so as to obtain a third trend which is deeper than the first trench.
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device formed by having a second conductive-type epitaxial layer piled up on a first conductive-type semiconductor substrate, comprising the steps of: arranging a
Hoang Quoc
NEC Corporation
Nelms David
Young & Thompson
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