Method of manufacturing semiconductor device including such inpu

Details Method of manufacturing semiconductor device including such inpu Method of manufacturing semiconductor device including such inpu

1992-01-06

1993-02-02

Thomas, Tom

Fishing, trapping, and vermin destroying

437 43, 437 44, 437 48, H01L 2170

Patent

active

051837730

ABSTRACT:
Disclosed is a structure of a semiconductor device in which an internal circuit including a memory device and a transistor having an LDD structure and an input protection device for protecting the internal circuit are formed on one semiconductor substrate, and a method of manufacturing such a semiconductor device. The input protection device and the memory device are formed at the same time. The input protection device as well as the memory device includes source/drain regions formed of high concentration inpurity regions and formed in the surface of the semiconductor substrate, and a gate electrode formed of a plurality of conductor films and formed on the surface of the semiconductor substrate between the source/drain regions. When an abnormal voltage is applied to an interconnection for supplying an electrical signal to the internal circuit, a charge flows from the interconnection through one source/drain region of the input protection device into the semiconductor substrate, so that the internal circuit is protected against an excessive charge.

REFERENCES:
patent: 4651406 (1987-03-01), Shimizu et al.
patent: 4663645 (1987-05-01), Komori et al.
patent: 4774421 (1988-09-01), Hartmann et al.
patent: 4818718 (1989-04-01), Kosa et al.
patent: 4830974 (1989-05-01), Chang et al.
patent: 4835597 (1989-05-01), Okuyama et al.

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