Method of manufacturing semiconductor device, including a step o

Details Method of manufacturing semiconductor device, including a step o Method of manufacturing semiconductor device, including a step o

1983-05-17

1985-03-19

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29591, 148 15, 148187, 357 231, 357 65, H01L 2122, H01L 2131, H01L 2128

Patent

active

045050244

ABSTRACT:
A conductor layer is formed on an insulating film which is formed on a semiconductor substrate and which consists of a thick portion and a thin portion with a step therebetween. A film made of material having an etch rate substantially equal to that of the material of the conductor layer is formed on the layer. The film, which has a substantially flat upper surface, and the conductor layer form a laminated structure. Those portions of the laminated structure which are on the thin portion of the insulating film and said step have substantially the same thickness. A mask layer of a predetermined pattern is formed on the laminated structure. Using the mask layer, the laminated structure is selectively etched, the selected portions of the conductor layer and film being etched at the same etching rate. Thereafter, the mask layer and the remaining film are removed.

REFERENCES:
patent: 4338138 (1982-07-01), Cavaliere et al.
patent: 4378627 (1983-04-01), Jambotkar
patent: 4378630 (1983-04-01), Horng et al.
Hom-ma et al., "LSI Surface Leveling by RF Sputter Etching", J. Electrochem. Soc. 126, pp. 1531-1532, (1979).
Adams, et al., "Planarization of Phosphorus-Doped Silicon Dioxide", J. Electrochem. Soc., 128, pp. 423-429, 1981.

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