Method of manufacturing semiconductor device having MIM...

Details Method of manufacturing semiconductor device having MIM... Method of manufacturing semiconductor device having MIM...

2011-07-19

2011-07-19

Richards, N Drew (Department: 2895)

Semiconductor device manufacturing: process

Making passive device

Planar capacitor

C438S239000, C438S250000, C438S622000, C257S508000, C257S532000, C257S758000

Reexamination Certificate

active

07981761

ABSTRACT:
In this invention, the film thicknesses of an upper barrier film of a lower electrode of a capacitive element and an upper barrier film of a metallic interconnect layer formed in the same layer as this is made thicker than the film thicknesses of upper barrier films of other metallic interconnect layers. Moreover, in this invention, the film thickness of the upper barrier film of the lower electrode of the capacitive element is controlled to be 110 nm or more, more preferably, 160 nm or more. A decrease in the dielectric voltage of the capacitive dielectric film due to cracks in the upper barrier film does not occur and the deposition temperature of the capacitive dielectric film can be made higher, so that a semiconductor device having a MIM capacitor with high performance and high capacitance can be achieved, where the dielectric voltage of the capacitive dielectric film is improved.

REFERENCES:
patent: 2001/0045651 (2001-11-01), Saito et al.
patent: 2006/0154433 (2006-07-01), Onoda
patent: 2006/0289917 (2006-12-01), Fujiwara et al.
patent: 2008/0020540 (2008-01-01), Takeda et al.
patent: 2002-043517 (2002-02-01), None
patent: 2002-329790 (2002-11-01), None
patent: 2005-311299 (2005-11-01), None

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