Fishing – trapping – and vermin destroying
Patent
1996-05-30
1998-02-10
Niebling, John
Fishing, trapping, and vermin destroying
437 43, 437 60, 437918, H01L 218247, H01L 21265
Patent
active
057168636
ABSTRACT:
A plurality of device isolation insulating layers are formed on the surface of a semiconductor substrate. A gate insulating layer is formed on the substrate surface between each device isolation insulating layer. After that, a first polysilicon layer is deposited over the entire surface of the substrate. The first polysilicon layer is patterned so that it is left on a region where a first transistor is to be formed and a resistive element is defined on one of the device isolation insulating layers. A silicon oxide layer is formed on a portion of the first polysilicon layer that is left to define the resistive element. This silicon oxide layer prevents impurities from penetrating into the polysilicon defining the resistive element and acts as an etching stopper for the polysilicon when a second polysilicon layer and a layer of refractory metal is removed.
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Booth Richard A.
Kabushiki Kaisha Toshiba
Niebling John
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