Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2003-10-14
2004-07-13
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S244000, C438S253000, C438S387000
Reexamination Certificate
active
06762110
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to methods of manufacturing semiconductor devices having a capacitor.
2. Description of the Background Art
A conventional manufacturing method of a capacitor has the following steps: (a) forming an interlayer dielectric film on an underlying layer composed of silicon oxide, (b) forming a through hole having a bottom surface defined by the underlying layer in the interlayer dielectric film, (c) forming a liner material composed of titanium nitride on a side surface and a bottom surface of the through hole, (d) forming a capacitor lower electrode composed of ruthenium on the liner material, and (e) forming a capacitor dielectric film composed of tantalum oxide and a capacitor upper electrode composed of ruthenium on the capacitor lower electrode in this order. Provision of the liner material is to improve adhesiveness between the interlayer dielectric film and the capacitor lower electrode (see Japanese Patent Application Laid-Open No. 2002-83880, for example).
The conventional capacitor manufacturing method has the following problem, however; there is a risk that the liner material and the underlying layer are dissolved by cleaning solutions and etchant solutions that are used subsequent to the above-described step (c), and as a result, the capacitor lower electrode peels off.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method of manufacturing a semiconductor device having a capacitor that is capable of improving adhesiveness between the interlayer dielectric film and the capacitor lower electrode without providing a liner material.
According to a first aspect of the invention, a method of manufacturing a semiconductor device having a capacitor includes the following steps (a) through (f). The step (a) is to form, on a first insulating film formed on a semiconductor substrate, a second insulating film. The step (b) is to form, in the first and second insulating films, a contact plug having an upper surface exposed in an upper surface of the second insulating film. The step (c) is to form third and fourth insulating films on a structure obtained by the step (b) in this order. The step (d) is to form a recess having a side surface and a bottom surface, the side surface defined by the third and fourth insulating films and the bottom surface defined by the upper surface of the second insulating film and the upper surface of the contact plug. The step (e) is to form a capacitor lower electrode on the side surface and the bottom surface of the recess. The step (f) is to form a capacitor upper electrode over the capacitor lower electrode so that a capacitor dielectric film is interposed therebetween. The second and third insulating films are made of a material having a higher adhesiveness to a material of which the capacitor lower electrode is made than a material of which the first and fourth insulating films are made.
Peeling-off of the capacitor lower electrode is suppressed.
According to a second aspect of the invention, a method of manufacturing a semiconductor device having a capacitor includes the following steps (a) through (g). The step (a) is to form a contact plug in a first insulating film formed on a semiconductor substrate, the contact plug having an upper surface exposed in an upper surface of the first insulating film. The step (b) is form a second insulating film on a structure obtained by the step (a). The step (c) is to partially form a predetermined film on an upper surface of the second insulating film. The step (d) is to form a recess by etching the second insulating film using the predetermined film as an etching mask, the recess having a side surface defined by the second insulating film and a bottom surface defined by the upper surface of the first insulating film and the upper surface of the contact plug. The step (e) is to form a conductive film on the side surface and the bottom surface of the recess and on the predetermined film. The step (f) is to form a capacitor lower electrode by removing the predetermined film and a portion of the conductive film that is present beyond an upper surface level of the second insulating film, the capacitor lower electrode formed of a remaining portion of the conductive film that has not removed. The step (g) is to form a capacitor upper electrode over the capacitor lower electrode so that a capacitor dielectric film is interposed therebetween. The, predetermined material is made of a material having a higher adhesiveness to a material of the capacitor lower electrode is made than a material of which the second insulating film is made.
Peeling-off of the capacitor lower electrode is suppressed.
According to a third aspect of the invention, a method of manufacturing a semiconductor device having a capacitor includes the following steps (a) through (e). The step (a) is to form a contact plug in a first insulating film formed on a semiconductor substrate, the contact plug having an upper surface exposed in an upper surface of the first insulating film. The step (b) is to form second and third insulating films on a structure obtained by the step (a) in this order. The step (c) is to form a recess by etching the second and third insulating films under a condition that an etching rate for a material of which the second insulating film is made is higher than an etching rate for a material of which the third insulating film is made, the recess having a first side surface defined by the third insulating film, a second side surface defined by the second insulating film and receding from the first side surface, and a bottom surface defined by the upper surface of the first insulating film and the upper surface of the contact plug. The step (d) is to form a capacitor lower electrode on the first side surface, the second side surface, and the bottom surface of the recess. The step (e) is to form a capacitor upper electrode over the capacitor lower electrode so that a capacitor dielectric film is interposed therebetween.
Peeling-off of the capacitor lower electrode is suppressed.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 5940714 (1999-08-01), Lee et al.
patent: 6187624 (2001-02-01), Huang
patent: 6255160 (2001-07-01), Huang
patent: 6292352 (2001-09-01), Yamamichi
patent: 6670238 (2003-12-01), Deboer et al.
patent: 6677636 (2004-01-01), Deboer et al.
patent: 2002/0022317 (2002-02-01), Fukuzumi
patent: 11-177048 (1999-07-01), None
patent: 2000-349257 (2000-12-01), None
patent: 2002-83880 (2002-03-01), None
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Picardat Kevin M.
Renesas Technology Corp.
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