Method of manufacturing semiconductor device having a two layere

Fishing – trapping – and vermin destroying

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437 44, 437193, H01L 21265

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active

052216306

ABSTRACT:
A semiconductor device not aggravated in transistor characteristic even when an impurity region is formed by ion implantation using a gate electrode as a mask, and a method of manufacturing thereof are disclosed. The semiconductor device includes a gate electrode 10 implemented by a polycrystal silicon layer 4 having the crystal orientation of the crystal grains thereof arranged in a predetermined orientation, and a single crystal silicon layer 5 formed on the polycrystal silicon layer 4 having a crystal orientation identical to that of the polycrystal silicon layer 4. The channelling phenomenon in which B.sup.+ ions pass through to beneath the gate electrode 10 is prevented in forming an impurity region 6 by ion implantation to obtain a semiconductor device that does not have the characteristic of the formed transistor aggravated.

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patent: 4897368 (1990-01-01), Kobushi et al.
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patent: 4921812 (1990-05-01), Nagai
patent: 5155369 (1992-10-01), Current
MOS LSI Manufacturing Technology, Nikkel McGraw-Hill, pp. 89-91, 1985.

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