Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to nonconductive state
Patent
1998-10-23
1999-12-21
Tsai, Jey
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to nonconductive state
438601, H01L 2182
Patent
active
060048344
ABSTRACT:
An interlayer insulating layer is formed to cover a fuse layer. A concave portion is provided on the surface of interlayer insulating layer located directly above fuse layer. A nitride layer as a passivation layer extends on the sidewalls of concave portion. In this way, a semiconductor device is obtained, the device having an improved moisture resistance, and in which a fuse can be easily blown by laser and a design rule of the region adjacent to the fuse can be improved.
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S. Wolf et al., "Silicon Processing for the VLSI Era", Lattice Press, Sunset Beach, California, vol. 1, Process Technology, 1986, pp. 192 and 199.
Arimoto Kazutami
Tsukude Masaki
Mitsubishi Denki & Kabushiki Kaisha
Tsai Jey
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