Method of manufacturing semiconductor device employing oxide sid

Details Method of manufacturing semiconductor device employing oxide sid Method of manufacturing semiconductor device employing oxide sid

1992-10-15

1994-11-22

Quach, T. N.

Fishing, trapping, and vermin destroying

437 44, 437 48, 437 52, 437228, 437229, 437984, 148DIG111, H01L 21336

Patent

active

053669134

ABSTRACT:
When a semiconductor is manufactured by a resist mask process while using photolithography techniques, the gate wiring width is increased without increasing the cell area by providing a sidewall on the gate mask and using the sidewall as a mask. The sidewall is produced by applying a CVD oxide film to the mask and removing the oxide film by anisotropic etching. This provides a minimum gate line width of 0.7.mu. and a minimum space width of 0.3.mu..

REFERENCES:
patent: 4792534 (1988-12-01), Tsuji et al.
patent: 5017515 (1991-05-01), Gill
patent: 5094971 (1992-03-01), Kanebako
patent: 5114872 (1992-05-01), Roselle et al.

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