Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2008-05-06
2008-05-06
Smith, Bradley K (Department: 2891)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C257SE21438
Reexamination Certificate
active
10983243
ABSTRACT:
A method of manufacturing a semiconductor device includes the steps of: exposing a semiconductor surface of a substrate; annealing the substrate in a hydrogen atmosphere at a hydrogen pressure between 200 Torr and 760 Torr and a temperature between 1000° C. and 1050° C. to planarize the exposed semiconductor surface; and forming a gate insulator film on the planarized semiconductor surface.
REFERENCES:
patent: 6630389 (2003-10-01), Shibata et al.
patent: 2003/0219948 (2003-11-01), Kuribayashi
patent: 10-012716 (1998-01-01), None
patent: 2003-229479 (2003-08-01), None
patent: 2003-282869 (2003-10-01), None
Hiruta Reiko
Kuribayashi Hitoshi
Shimizu Ryosuke
Fuji Electric Device Technology Co. Ltd.
Kanesaka Manabu
Smith Bradley K
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