Cleaning and liquid contact with solids – Processes – Including application of electrical radiant or wave energy...
Reexamination Certificate
2000-12-19
2002-09-10
Goudreau, George (Department: 1763)
Cleaning and liquid contact with solids
Processes
Including application of electrical radiant or wave energy...
C438S704000, C438S719000, C438S723000, C438S724000, C438S725000, C438S734000, C438S750000, C438S753000
Reexamination Certificate
active
06446641
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device manufactured thereby. More particularly, the present invention relates to a method of manufacturing a semiconductor device which is suitable for anisotropically etching a desired location of a semiconductor wafer at high etch selectivity and with high precision, as well as to a semiconductor device manufactured thereby.
2. Description of the Background Art
During the course of manufacture of a semiconductor device, an area surrounded by non-etching regions becomes an object of etching. Accurately etching such an area without involvement of occurrence of residues requires high etch selectivity and high anisotropy. For this reason, in order to etch an area surrounded by non-etching regions, there have conventionally been employed in combination a main etching operation with emphasis on an anisotropic etching operation (dry etching), and an overetching operation with an emphasis on etch selectivity (i.e., dry etching).
In some structures which are to be embodied, an area surrounded by non-etching areas cannot be etched by means of setting only conditions for dry etching. For example, in a case where a structure to be embodied includes a large step difference, it may be impossible to reliably prevent occurrence of residues while ensuring the accuracy of geometry of non-etching regions, no matter how dry etching conditions is adjusted. In such a case, the etching process hinders an improvement in a manufacturing yield.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve such a problem and is aimed at providing a method of manufacturing a semiconductor device which ensures good accuracy of geometry and prevents occurrence of residues even in a case where a structure to be embodied includes a large step.
Further, the present invention provides a semiconductor device manufactured by the method.
The above objects of the present invention are achieved by a method of manufacturing a semiconductor device. The method includes a first etching step. In the first etching step, etching object parts of predetermined material are etched away by means of dry etching while non-etching regions are covered with a mask. The method also includes a second etching step. In the second etching step, residues of the predetermined material remaining in the etching object parts are etched away by means of wet etching.
The above objects of the present invention are also achieved by a semiconductor device manufactured by the method described above.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 4584055 (1986-04-01), Kayanuma et al.
patent: 5147499 (1992-09-01), Szwejkowski et al.
patent: 5682062 (1997-10-01), Gaul
patent: 4-96329 (1992-03-01), None
Goudreau George
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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