Method of manufacturing semiconductor device, and...

Details Method of manufacturing semiconductor device, and... Method of manufacturing semiconductor device, and...

2008-06-27

2010-12-14

Doan, Theresa T (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S753000, C257S754000, C438S653000, C438S637000

Reexamination Certificate

active

07851924

ABSTRACT:
A semiconductor device including a substrate, a metal wiring on the substrate, an insulation film on the substrate covering the metal wiring, a connection hole in the insulation film which extends to a portion of the metal wiring, a via in the connection hole, and an alloy layer. The metal wiring includes a first metallic material, the alloy layer comprises a portion of the metal wiring and a second metallic material which is different than the first metallic material, and the via extends to the alloy layer.

REFERENCES:
patent: 2006/0108320 (2006-05-01), Lazovsky et al.
patent: 02-050432 (1990-02-01), None
patent: 07-297194 (1995-11-01), None
patent: 2001-341977 (2001-12-01), None
Japanese Patent Office Action corresponding to Japanese Serial No. 2004-358140 dated Nov. 17, 2009.

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