Method of manufacturing semiconductor device

Details Method of manufacturing semiconductor device Method of manufacturing semiconductor device

1988-02-05

1989-04-25

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437229, 437 31, 437133, 437105, 437203, 148DIG11, 357 34, 156653, 156657, 156652, H01L 21265

Patent

active

048248053

ABSTRACT:
A method of manufacturing a heterojunction bipolar transistor comprising the sequential steps of; forming an extra epitaxial layer (9) on a layered structure which consists of a collector layer (2), a base layer (3), and an emitter layer (4) provided on a semiconductor substrate (1) in that order; forming a recess (10) by selectively etching the extra epitaxial layer (9); and forming an emitter electrode (70a) and a resist mask (70a) in the recess (10) by way of self alignment scheme, where the resist mask (70a) covers the emitter electrode (60e). An extremely small-sized resist mask (70a) can be formed, and extremely small-sized emitter mesa (4a) is formed by applying wet etching to the epitaxial layer (9) and the emitter layer (4) using the resist mask (70a).

REFERENCES:
patent: 4038110 (1977-07-01), Feng
patent: 4545852 (1985-08-01), Barton
patent: 4634496 (1987-01-01), Mase
patent: 4675984 (1987-06-01), Hsu
patent: 4689113 (1987-08-01), Balasubramanyra
patent: 4746629 (1988-05-01), Hanagasaki
patent: 4764483 (1988-08-01), Fuse
patent: 4766089 (1988-08-01), Davids

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