Method of manufacturing semiconductor device

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C438S107000, C438S110000, C438S124000, C438S127000, C257SE21502, C257SE21511

Reexamination Certificate

active

07615408

ABSTRACT:
An internal connecting terminal12is formed on electrode pads23of a plurality of semiconductor chips11formed on a semiconductor substrate35, and there is formed a resin member13having a resin member body13-1and a protruded portion13-2and covering the semiconductor chips11on which the internal connecting terminal12is formed, a metal layer39is formed on the resin member body13-1and the protruded portion13-2is used as an alignment mark to form a resist film48covering the metal layer39in a part corresponding to a region in which a wiring pattern14is formed and to then carry out etching over the metal layer39by using the resist layer48as a mask, thereby forming the wiring pattern14which is electrically connected to the internal connecting terminal12.

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patent: 7091620 (2006-08-01), Miyazaki et al.
patent: 7396700 (2008-07-01), Hsu
patent: 2002/0047215 (2002-04-01), Akiyama et al.
patent: 2003/0001286 (2003-01-01), Kajiwara et al.
patent: 2004/0115868 (2004-06-01), Ono
patent: 2006/0192294 (2006-08-01), Lee
patent: 2008/0230897 (2008-09-01), Machida
patent: 1 933 377 (2008-06-01), None
patent: 10-256306 (1998-09-01), None
patent: 2002-313985 (2002-10-01), None

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