Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2001-08-24
2004-02-24
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S293000, C257S324000, C257S306000
Reexamination Certificate
active
06696346
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device and a method of manufacturing thereof, and more specifically, to a semiconductor device comprises an electrode having a low electric resistivity and a method of manufacturing the same.
2. Description of the Related Art
A semiconductor device
100
including a capacitor therein (hereinafter referred to as a capacitor type semiconductor device) used conventionally is diagrammed in FIG.
9
. The capacitor type semiconductor device comprises a semiconductor substrate
101
, a field oxidation layer
103
, a lower electrode
105
, side walls
107
, an ONO (oxide-nitride-oxide) layer
109
, an upper electrode
113
, an inter-layer film
115
, electrodes
117
for contact, and a passivation layer
119
. Both the lower electrode
105
and the upper electrode
113
are made of poly-silicon.
Next, a method of fabricating the capacitor type semiconductor device
100
will be briefly described hereunder. The lower electrode
105
is formed by carrying out etching to a poly-silicon layer provided on the field oxidation layer
103
after disposing the field oxidation layer
103
on the semiconductor substrate
101
. Then, the ONO layer
109
is formed on the field oxidation layer
103
so as to cover both the lower electrode
105
and the side walls
107
.
The ONO layer
109
is formed in the order described below. At first, a silicon-oxidation (oxidation) layer which contacts to the lower electrode
105
is formed by thermal oxidation. The temperature caused by thermal oxidation is approximately 900°. Then, a silicon nitride (nitride) layer is disposed by low pressure chemical vapor deposition (LPCVD). Thereafter, another silicon oxidation (oxidation) layer positioned at the uppermost of the ONO layer
109
is formed by the thermal oxidation similar to the silicon oxidation layer previously formed.
Another layer made of poly-silicon is provided on the ONO layer
109
thus formed. The upper electrode
113
is formed by carrying out etching to the poly-silicon layer provided on the ONO layer
109
. The inter-layer film
115
is formed by carrying out reflow process after disposing a layer made of Boro-Phospho-Silicate Glass (BPSG) on the entire surface. Thereafter, the contact electrodes
117
made of aluminum, or other materials having a high conductivity are provided in openings formed for the electrodes. Then the passivation layer
119
is disposed on the entire surface.
In the capacitor type semiconductor device
100
described above, however, the following problems are encountered. Poly-crystalline silicon has been used for electrodes as one of materials having the most stable and excellent electric characteristics. In large scale integration circuits (LSIs), a high integration and a fine work become a technological trend. A relatively high electric resistance which is originally owned by poly-crystalline silicon is a key issue to be resolved. Electric signals pass through a layer made of poly-crystalline silicon drastically slow down their transmission speed because of the high electric resistance, so that high-speed operation of LSIs cannot be achieved.
In order to reduce the electric resistance of the layer made of poly-crystalline silicon, a chemical compound such as silicide made of silicon and metals is used instead of poly-crystalline silicon. Silicide has the following advantages; electric resistivity is approximately one tenth of poly-crystalline silicon, stable in processes carried out at a high temperature, and having a high chemical resistance.
In general, a gate electrode consisting two layers made of poly-crystalline silicon and silicide is formed when silicide is used as a material of an electrode. This is to adjust conditions at the boundary of the silicide layer such as work function and/or surface density of charge to the conditions of the poly-crystalline silicon layer having stable characteristics. At present, silicide mainly used is a refractory metal silicide such as tungsten silicide (WSi2) and the like.
However, it accompanies much difficulties to turn the material of the lower electrode
105
into silicide (silification) considering the manufacturing process of the capacitor type semiconductor device
100
. Because the ONO layer
109
is used as an intermediate layer of a capacitor provided in the capacitor type semiconductor device
100
. Therefore, the silicon oxidation layer forming the lowermost position of the ONO layer
109
must be disposed on the lower electrode
105
. As described, the silicon oxidation layer is formed by thermal oxidation.
On the contrary, it is assume that the material of the lower electrode
105
is turned into silicide by using tungsten and the like. In that case, adverse effects are caused on a surface of the lower electrode where is turned into silicide by carrying out thermal oxidation. Since the thermal oxidation is carried out at a very high temperature, tungsten once turned into silicide is unexpectedly oxidized. As a result of the oxidation, one of the advantages of silicide such as the electric resistivity approximately one tenth of poly-crystalline silicon can not be maintained.
It is, therefore, very difficult to reduce electric resistance of the lower electrode
105
by turning the material of the electrode into silicide because of the thermal oxidation carried out for forming the ONO layers.
SUMMARY OF THE INVENTION
It is an object of the present invention to overcome the above mentioned drawbacks on the capacitor type semiconductor device, and to provide a semiconductor device capable of decreasing electric resistance of a lower electrode provided therein.
In accordance with characteristics of the present invention, there is provided a semiconductor device comprises:
a lower electrode formed on a semiconductor substrate,
an insulation layer disposed on the lower electrode, and
an upper electrode formed on the insulation layer,
wherein the lower electrode includes a protection part formed with an oxygen penetration restricting material and a low electric resistance part formed with an anaerobic material having a lower electric resistant than that of the oxygen penetration restricting material, and wherein the protection part is located between the low electric resistance part and the insulation layer.
In accordance with characteristics of the present invention, there is provided a method of manufacturing a semiconductor device comprises the steps of:
forming a low electric resistance part made of an anaerobic material having a certain conductivity on a semiconductor substrate,
disposing a protection part made of an oxygen penetration restricting material on the low electric resistance part,
forming an insulation layer on the protection part by thermal oxidation, and
disposing an upper electrode on the insulation layer.
REFERENCES:
patent: 4935380 (1990-06-01), Okumura
patent: 5071788 (1991-12-01), Joshi
patent: 5418398 (1995-05-01), Sardella et al.
patent: 5656840 (1997-08-01), Yang
patent: 5801427 (1998-09-01), Shiratake et al.
patent: 7-022589 (1995-01-01), None
Lee Calvin
Rohm & Co., Ltd.
Smith Matthew
LandOfFree
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