Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2011-06-07
2011-06-07
Tran, Thien F (Department: 2895)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C257S532000, C257SE29343
Reexamination Certificate
active
07955944
ABSTRACT:
A method of manufacturing a semiconductor device includes forming a wiring layer in a first insulating layer, forming a second insulating layer over the first insulating layer, forming a first conductive layer over the second insulating layer, forming a dielectric layer on the first conductive layer, forming a second conductive layer on the dielectric layer, selectively removing the second conductive layer to form an upper electrode on the dielectric layer, forming a first layer over the upper electrode and the dielectric layer, selectively removing the first layer, the dielectric layer, and the first conductive layer to form a lower electrode over which the dielectric layer and the first layer is entirely left, the upper electrode remaining partially over the lower electrode.
REFERENCES:
patent: 2005/0082589 (2005-04-01), Noda et al.
patent: 2008/0277762 (2008-11-01), Takewaki et al.
patent: 2000-357773 (2000-12-01), None
patent: 2005-79513 (2005-03-01), None
Osada Tatsuro
Saigoh Kaoru
Fujitsu Semiconductor Limited
Tran Thien F
Westerman Hattori Daniels & Adrian LLP
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