Method of manufacturing semiconductor device

Details Method of manufacturing semiconductor device Method of manufacturing semiconductor device

1997-03-13

1999-12-28

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

438592, 438597, 438620, H01L 2120

Patent

active

060081112

ABSTRACT:
A manufacturing method of a semiconductor device of the present invention comprises the steps of forming an amorphous layer on an upper layer of the impurity diffusion layer made of silicon by virtue of ion-implantation, forming a cobalt film on the impurity diffusion layer, forming a cobalt silicide layer made of Co.sub.2 Si or CoSi on an upper layer of the amorphous layer at a low temperature by reacting the cobalt film to silicon in the impurity diffusion layer in virtue of first annealing, then removing the cobalt film which has not reacted, and changing Co.sub.2 Si or CoSi constituting the cobalt silicide layer into CoSi.sub.2 to have low resistance and also rendering the cobalt silicide layer to enter into a depth identical to or deeper than an initial depth of the amorphous layer in virtue of second annealing.

REFERENCES:
patent: 4877755 (1989-10-01), Rodder
patent: 5750437 (1998-05-01), Oda
A New Salicide Process (PASET) for Sub-Half Micron CMOS, I. Sakai et al.; 1992 Symposium on VLSI Technology, 1992.
0.15.mu.m CMOS Process for High Performance and High Reliability, S. Shimizu et al., International Electron Devices meeting, 1994, San Francisco, CA, Dec. 11-14, 1994.
A New Colbat Salicide Technology for 0.15.mu.m CMOS Using High-Temperature Sputtering and In-Situ Vacuum Annealing, K. Inoue et al., International Electron Devices meeting, 1995, Washington, D.C., Dec. 10-13, 1995.

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