Method of manufacturing semiconductor device

Metal working – Method of mechanical manufacture – Assembling or joining

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29578, 29576B, 29589, 29591, 148 15, 148188, 148DIG19, 148DIG147, 357 67, 357 233, 357 59, H01L 2978, H01L 21225

Patent

active

045585075

ABSTRACT:
The present invention relates to a method of forming a diffused region with a shallow junction having a refractory metal silicide layer thereon. At first, the refractory metal silicide layer is selectively formed on a silicon substrate of one conductivity type. An insulating film is then formed at least on the refractory metal silicide layer, and a contact hole is opened on a part of the silicide layer. After necessary high temperature treatments have been conducted, a dopant impurity of the opposite conductivity type is introduced from the contact hole to the silicide layer. The impurity is laterally dispersed in the silicide layer and diffused into the whole portion of the silicon substrate in contact with the silicide layer, whereby the diffused region with a shallow junction can be formed.

REFERENCES:
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patent: 3887993 (1975-06-01), Okada et al.
patent: 4259680 (1981-03-01), Lepselter et al.
patent: 4343082 (1982-08-01), Lepselter et al.
Kircher et al., "Fabricating a Gate Field-Effect Transistor" IBM Tech. Disc. Bull., vol. 13, No. 3, Aug. 1970, pp. 646-648.
Chapman et al., "Silicide Formation by High-Dose Si.sup.+ ion Implantation of Pd" J. Appl. Phys. 50(10), Oct. 1970, 6321-6327.
Laibowitz et al., "Fabrication of Vias in a Multilayered Metallization in LSI Technology" IBM Tech. Disc. Bull., vol. 21, No. 12, May 1979, pp. 5051-5052.
Thin Films-Interdiffusion and Reactions, by Poate; Tu; Mayer; John Wiley & Sons Publisher.

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