Semiconductor device manufacturing: process – Semiconductor substrate dicing – With attachment to temporary support or carrier
Reexamination Certificate
2001-11-14
2003-03-18
Chaudhuri, Olik (Department: 2823)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
With attachment to temporary support or carrier
C438S465000
Reexamination Certificate
active
06534386
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates a method of manufacturing semiconductor chips by which reliable semiconductor chips can be manufactured easily, at a low cost, and with a high chip yield.
BACKGROUND OF THE INVENTION
In order to advance the ability to make portable electronic equipment, such as digital video cameras, digital cellular telephones, notebook personal computers, and the like, more compact, thinner, and lighter, an important aspect is to improve the surface packaging density of electronic parts within the equipment. For the packaging of semiconductor chips which are one type of electronic part, various SOPs (Small Outline Packages), whose outer configuration dimensions are close to the dimensions of a chip main body due to contrivances made with respect to the internal structure of the package, have been proposed.
One example of a conventional method of manufacturing such a SOP will be described with reference to
FIG. 7A
to FIG.
7
D. First, a semiconductor wafer
101
, for which all of the integrated circuit forming processes have been completed, is adhered onto a scribe sheet
201
(see
FIG. 7A
) Next, from the electrode surface side of the semiconductor wafer, by using a dicing saw
301
, the semiconductor wafer is cut along dicing lines
102
into individual semiconductor chips
101
a
(see FIG.
7
B).
After the cutting of the semiconductor wafer along the dicing lines
102
into the individual semiconductor chips
101
a
is finished, with the semiconductor chips
101
a
still adhered on the scribe sheet
201
, the upper surfaces of the semiconductor chips
101
a
and the gaps between adjacent semiconductor chips
101
a
are sealed by a sealing resin
104
(see FIG.
7
C).
After the sealing resin
104
has been cured, a second dicing is carried out along the previous dicing lines, but at a width B which is narrower than the previous dicing width A. The semiconductor chips
101
a
, which are made integral through the sealing resin
104
, are cut into the individual semiconductor chips
101
a
(see FIG.
7
D).
However, in the above-described method, because a total of two dicings are required at the time of semiconductor wafer separation and sealing resin separation, a problem arises in that the manufacturing cost is high. Further, after dicing the wafer, in order to carry out the second dicing at the width B which is narrower than the wafer dicing width A, the dicing width A for the time of wafer dicing must be made large. A problem arises in that the effective number of chips which can be obtained from one semiconductor wafer is low, and the chip yield is low.
Furthermore, because dicing is carried out after resin sealing, when the entire surface is merely covered by the sealing resin, the positions of the dicing lines are unclear, the dicing lines cannot be directly confirmed, and it is difficult to improve the precision of dicing. Thus, a transparent resin must be used as the sealing resin, or marks must be provided in advance on extensions of the dicing lines.
Moreover, in the technique for carrying out dicing after resin sealing, at the time of dicing the sealing resin, the interface between the sealing resin and the semiconductor chip separates, and a problem arises in that the reliability of the semiconductor chip deteriorates.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method of manufacturing semiconductor chips in which, by a single dicing, reliable semiconductor chips can be manufactured easily and at low cost and at a high chip yield.
The method of manufacturing semiconductor chips according to one aspect of the invention comprises the steps of: adhering a sheet that is to be drawn to a reverse side of a semiconductor wafer on which an integrated circuit has been formed; separating individual semiconductor chips from the semiconductor wafer by dicing the semiconductor wafer from a front side along dicing lines; providing a sealing resin layer formed from an uncured sealing resin on upper surfaces of the semiconductor chips and in gaps between adjacent semiconductor chips, with the individual semiconductor chips maintained in a collected state, thereby sealing the semiconductor chips; and drawing the sheet, thereby separating the uncured sealing resin along the dicing lines.
According to the above-mentioned aspect, at the time when the resin filled on the diced semiconductor chips is in an uncured state, the sheet is drawn in a two dimensional plane with the semiconductor chips adhered on the sheet. In this way, the gaps between the semiconductor chips widen, and the sealing resin, which is filled into the gaps between the semiconductor chips and which is in an uncured state, is cut. The semiconductor chips, which were integral through the sealing resin, are separated into individual semiconductor chips.
The method of manufacturing semiconductor chips according to another aspect of the invention comprises the steps of: adhering a sheet that is to be drawn to a reverse side of a semiconductor wafer on which an integrated circuit has been formed; separating individual semiconductor chips from the semiconductor wafer by dicing the semiconductor wafer from a front side along dicing lines; providing a sealing resin layer formed from an uncured sealing resin on upper surfaces of the semiconductor chips and in gaps between adjacent semiconductor chips, with the individual semiconductor chips maintained in a collected state, thereby sealing the semiconductor chips transforming the uncured sealing resin into a semi-cured state; and drawing the sheet, thereby separating the sealing resin in the semi-cured state along the dicing lines.
According to the above-mentioned aspect, at the time when the resin filled on the diced semiconductor chips is in a semi-cured state after a preliminary curing, the sheet is drawn in a two dimensional plane with the semiconductor chips adhered on the sheet. In this way, the gaps between the semiconductor chips widen, and the sealing resin, which is filled into the gaps between the semiconductor chips and which is in a semi-cured state, is cut. The semiconductor chips, which were integral through the sealing resin, are separated into individual semiconductor chips.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
REFERENCES:
patent: 5882956 (1999-03-01), Umehara et al.
patent: 2001/0018229 (2001-08-01), Kato et al.
patent: 2002/0014661 (2002-02-01), Okamoto et al.
patent: 11-121507 (1999-04-01), None
patent: 2000-21906 (2000-01-01), None
Chaudhuri Olik
Leydig , Voit & Mayer, Ltd.
Maldonado Julio J.
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