Method of manufacturing PN junctions in a semiconductor region t

Details Method of manufacturing PN junctions in a semiconductor region t Method of manufacturing PN junctions in a semiconductor region t

1977-09-21

1980-03-04

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

357 20, 357 34, 357 50, 357 91, H01L 2972, H01L 21225

Patent

active

041915950

ABSTRACT:
In a semiconductor device including at least one active semiconductor region isolated by an oxide layer in a semiconductor substrate having a principal surface, at least two PN junctions, terminating at the oxide layer, are formed in the active region, by introduction of impurities into the active region with the active region surface never exposed during their formation. The junctions may partly reach the principal surface. The impurities may be introduced by ion implantation through a thin oxide film overlying the active region, and through use of other films placed on the oxide film, or by the known melt-through technique. At least one junction may be formed by epitaxial growth of a semiconductor layer of the opposite conductivity type.

REFERENCES:
patent: 3798081 (1974-03-01), Beyer
patent: 3904450 (1975-09-01), Evans et al.
patent: 3933540 (1976-01-01), Kondo et al.
patent: 3993513 (1976-11-01), O'Brien
patent: 3996077 (1976-12-01), Cornelis
patent: 4001465 (1977-01-01), Graul et al.
patent: 4008107 (1977-02-01), Hayasaka et al.
patent: 4044454 (1977-08-01), Magdo
patent: 4066473 (1978-01-01), O'Brien
Evans et al., "Oxide Isolated Ion-Implanted Bipolar. . .", Digst. of Tech. Papers of 1973 IEEE Int. Solid State Circuits Conf., Philadelphia, Pa. USA, 14-16 Feb. 1973.
Jambotkar, "Recessed Oxide Isolated I.Cs.", IBM-TDB, 19 (1977) 4598.
Ko, "Recessed Oxide Isolation Method", IBM-TDB, 19 (1976), 1222.

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