Semiconductor device manufacturing: process – Chemical etching
Reexamination Certificate
2007-01-30
2007-01-30
Norton, Nadine (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
C438S719000, C361S764000, C427S383700, C427S405000
Reexamination Certificate
active
11011401
ABSTRACT:
Disclosed herein is a method of manufacturing a package substrate with a fine circuit pattern using anodic oxidation. By anodizing a metal core which is opened through a masking process, oxidation layers are formed in open areas of the metal core to insulate portions of circuit pattern from each other. Further, by electroplating portions provided between the oxidation layers with copper or filling conductive paste between the oxidation layers using a screen, a package substrate having a fine circuit pattern is achieved.
REFERENCES:
patent: 6300686 (2001-10-01), Hirano et al.
patent: 6486006 (2002-11-01), Hirano et al.
patent: 6620731 (2003-09-01), Farnworth et al.
patent: 2004/0113244 (2004-06-01), Shin et al.
Korean Publication No. 1020030073919 A published Sep. 19, 2003.
Bae Jong Suk
Cho Suk-Hyeon
Kim Tae Hoon
Maeng Duck Young
Mok Jee Soo
Norton Nadine
Samsung Electro-Mechanics Co. Ltd.
Umez-Eronini Lynette T.
LandOfFree
Method of manufacturing package substrate with fine circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing package substrate with fine circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing package substrate with fine circuit... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3747358