Method of manufacturing low resistance gates and interconnection

Details Method of manufacturing low resistance gates and interconnection Method of manufacturing low resistance gates and interconnection

1981-01-08

1983-07-12

Ozaki, G.

Metal working

Method of mechanical manufacture

Electrical device making

148174, 427 84, 427 91, H01L 21285

Patent

active

043922996

ABSTRACT:
A method of forming low resistance silicided gates or interconnects is described wherein a refractory metal and silicon is simultaneously co-deposited to form a composite layer which is thereafter heat treated in a non-oxidizing atmosphere to form the polycrystalline state of the silicide.

REFERENCES:
patent: 2602033 (1952-07-01), Lander
patent: 2671739 (1954-03-01), Lander
patent: 3519504 (1970-07-01), Cuomo
patent: 3617824 (1971-11-01), Shinoda et al.
patent: 3881242 (1975-05-01), Nuttall et al.
patent: 4065588 (1977-12-01), Arnold
patent: 4149307 (1979-04-01), Henderson
patent: 4283439 (1981-08-01), Higashinakagawa et al.
Lepselter, Bell System Journal, vol. XLV, No. 2, Feb. 1966, pp. 233-253.

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