Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
1999-12-07
2002-03-26
Parker, Kenneth (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S141000
Reexamination Certificate
active
06362858
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a liquid crystal device, and more particularly to a method of manufacturing a FFS(fringe field switching) mode-liquid crystal display device driving with fringe field.
2. Description of the Related Art
A FFS mode-liquid crystal display device is suggested for improving aperture ratio and transmittance as illustrated in U.S. Pat. Ser. No. 09/087,422. In this FFS mode-liquid crystal display device, counter and pixel electrodes are formed of a transparent conductor. Furthermore, the space between the counter and pixel electrodes is narrow, so that a fringe field is formed therebetween in a presence of electric field, thereby driving all liquid crystal molecules existing on the electrodes.
FIG. 1
is a cross sectional view showing the conventional FFS mode-liquid crystal display device.
Referring to
FIG. 1
, a first ITO(indium tin oxide) layer and a first metal layer having a low resistivity are sequentially formed on a transparent insulating substrate
10
and patterned using a first mask to form a gate bus line
12
and a common signal line(not shown). Preferably, the first metal layer is formed of a MoW layer. The exposed first ITO layer is then patterned using a second mask to form a counter electrode
13
in the shape of comb or oblique plate. Thereafter, a gate insulating layer
14
is formed on the overall substrate and an amorphous silicon layer and a silicon nitride layer are sequentially thereon. The silicon nitride layer is then patterned using a third mask to form an etch stopper
16
.
Next, a doped amorphous silicon layer is deposited on the overall substrate. The doped amorphous silicon layer and the amorphous silicon layer are then patterned using a fourth mask to form an ohmic layer
17
and a channel layer
15
. As not shown in
FIG. 1
, the gate insulating layer
14
is then etched using a fifth mask to open pad portions. A second metal layer having a low resistivity is then deposited on the overall substrate and patterned using a sixth mask to form a source and a drain
18
a
and
18
b
. Thereafter, a second ITO layer is formed on the overall substrate and patterned using a seventh mask to form a pixel electrode
19
in the shape of comb. A passivation layer
100
is then deposited on the overall substrate and patterned using a eighth mask so as to cover a thin film transistor portion.
However, as described above, eighth masks are required for manufacturing the liquid crystal display device, so that process is complicated and process time is long. As a result, cost is increases and yield decreases.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of manufacturing a fringe field switching mode-liquid crystal display device which can simplify process by reducing mask number, for solving the problems in the conventional art.
To accomplish this above object, according to the present invention, a first transparent metal layer and a first metal layer are sequentially deposited on a transparent insulating substrate and patterned using a first mask, thereby forming a gate bus line and defining a pattern portion having counter electrode and common signal line regions. Next, a gate insulating layer, an amorphous silicon layer and a silicon nitride layer are sequentially deposited on the overall substrate and the silicon nitride layer is patterned using a second mask, thereby forming a etch stopper on the gate bus line. The pattern portion is then patterned using a third mask so as to be exposed in the shape of plate, thereby forming a counter electrode consisting of the first transparent metal layer and a common signal line consisting of the first metal layer and opening pad portions. Thereafter, a doped amorphous silicon layer and a second metal layer are sequentially deposited on the overall substrate and the second metal layer is patterned using a fourth mask, thereby forming a data bus line, a source and a drain. The doped amorphous silicon layer and the amorphous silicon layer are then etched using the source and the drain as a mask to form an ohmic layer and a channel layer. Next, a passivation layer is formed on the overall substrate and etched so as to expose a portion of the source, thereby forming a contact hole. Thereafter, a second transparent metal layer is deposited on the passivation layer so as to fill the contact hole and patterned using a sixth mask, thereby forming a pixel electrode in the shape of comb. Here, the pixel electrode overlaps with the counter electrode and is in contact with the source.
Additional object, advantages and novel features of the invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
REFERENCES:
patent: 4560994 (1985-12-01), Sprague
patent: 5576862 (1996-11-01), Sugiyama et al.
patent: 5959708 (1999-09-01), Lee et al.
patent: 6014190 (2000-01-01), Kim et al.
patent: 6064451 (2000-05-01), Oh et al.
patent: 6191837 (2001-02-01), Fujimaki et al.
patent: 6233034 (2001-05-01), Lee et al.
patent: 04316022 (1992-11-01), None
Jeon Jong Yob
Lee Jung Yeal
Chung David
Hyundai Display Technology Inc.
Ladas & Parry
Parker Kenneth
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