Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
2000-03-07
2001-11-27
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C438S030000, C349S001000, C349S042000, C349S043000, C257S072000
Reexamination Certificate
active
06323051
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of manufacturing a liquid crystal display, and more particularly, to a method of manufacturing an active matrix type liquid crystal display in which a matrix of switching thin film transistors are formed in one-to-one correspondence with pixel portions.
BACKGROUND OF THE INVENTION
Generally, an active matrix type liquid crystal display is advantageous in many aspects, such as low power consumption, thinness, and lightness, and therefore, has been showing promise for use as a display device in diversified fields including a notebook personal computer, a mobile terminal, a TV set, etc.
Under these circumstances, there has been an increasing need for an inexpensive active matrix type liquid crystal display. To this end, various techniques have been discussed to save the manufacturing costs by improving productivity of a thin film transistor (TFT) array substrate. Among others, a technique for reducing the number of times a photomask is used during the manufacturing procedure of the active matrix type liquid crystal display has been studied extensively.
For example, Japanese Laid-open Patent Application No. 152626/1997 (Japanese Official Gazette,
Tokukaihei
No. 9-152626, publishing date: Jun. 10, 1997) discloses a manufacturing procedure using the photomask a fewer number of times. The following will describe an active matrix type liquid crystal display and the manufacturing method thereof in accordance with the above publication with reference to FIGS.
5
(
a
) through
5
(
d
),
6
and
7
.
FIGS.
5
(
a
) through
5
(
d
) are cross sections showing the manufacturing procedure of an outlet electrode portion of a source signal line and the vicinity thereof in a TFT array substrate forming the active matrix type liquid crystal display disclosed in the above publication. Also,
FIG. 6
is a plan view of the TFT array substrate forming the active matrix type liquid crystal display disclosed in the above publication. Further,
FIG. 7
is a cross section explaining an arrangement of a thin film transistor
121
and the vicinity thereof in the TFT array substrate forming the active matrix type liquid crystal display disclosed in the above publication.
As shown in
FIGS. 6 and 7
, the active matrix type liquid crystal display disclosed in the above publication includes a TFT array substrate described more in detail below, an unillustrated counter electrode substrate provided with a counter electrode, unillustrated liquid crystal sealed in a space between these substrates, etc. The TFT array substrate has a glass substrate
101
provided with {circle around (1)} a plurality of gate signal lines (scanning signal lines)
102
and a plurality of source signal lines (image signal lines)
124
formed on the surface of the glass substrate
101
through insulating films
103
and
103
′ in such a manner so as to intersect with each other at right angles, {circle around (2)} a matrix of pixel electrodes
126
each formed at each intersection of the gate signal lines
102
and source signal lines
124
, and {circle around (3)} a matrix of TFTs
121
of a reverse stagger type formed in one-to-one correspondence with the pixel electrodes
126
to supply a pixel signal to the same. It should be appreciated that the TFTs
121
of the reverse stagger type do not require an etching stopper film in a channel region.
As shown in
FIG. 7
, each TFT
121
comprises a gate electrode G which protrudes upward perpendicularly from the gate signal line
102
, a gate insulating film composed of the insulating films
103
and
103
′, a high-resistance semiconductor film
104
which will be made into a channel region, a low-resistance semiconductor film
105
which will be made into a source electrode S and a drain electrode D, a source metal film
106
, a transparent conductive film
107
, and a protection film
108
, which are layered sequentially from bottom to top in this order.
Next, the following will explain a conventional manufacturing method of the active matrix type liquid crystal display with reference to FIGS.
5
(
a
) through
5
(
d
).
Initially, as shown in FIG.
5
(
a
), the gate signal line
102
and gate electrode G are formed by forming a film of aluminum alloy, metal having a high melting point, or the like on the glass substrate
101
by means of sputtering, etc. and patterning (forming a pattern on) the film thus formed.
Then, as shown in FIG.
5
(
b
), a double-layer structure composed of the insulating films
103
and
103
′, the high-resistance semiconductor film
104
, and the low-resistance semiconductor film
105
are formed sequentially by means of plasma CVD (Chemical Vapor Deposition), etc. Subsequently, the source metal film
106
is formed on the foregoing films out of metal having a high melting point or alloy of such metals by means of sputtering, etc. Then, the source metal film
106
, low-resistance semiconductor film
105
, and high-resistance semiconductor film
104
thus formed are photo-etched with a pattern simultaneously by using a single photomask.
Then, as shown in
FIG. 5
(
c
), the transparent conductive film
107
is formed on the source metal film
106
out of ITO (Indium-Thin Oxide), etc. by means of sputtering, etc. Subsequently, the transparent conductive film
107
, source metal film
106
, and low-resistance conductive film
105
are selectively photo-etched by using a single photomask.
Then, by forming the protection film
108
and removing a part thereof, a TFT
121
′, and unillustrated source signal line
124
and pixel electrode
126
, etc. are formed.
Finally, as shown in
FIG. 5
(
d
), by forming the protection film
108
out of a film of silicon nitride, etc. by means of plasma CVD, etc. and patterning the same, the protection film
108
covering the unillustrated external outlet electrode portion of the source signal line
124
and pixel electrode portion
126
is removed, while at the same time the insulating films
103
and
103
′ and protection film
108
covering the unillustrated external outlet electrode portion of the gate signal line
102
are removed, whereby the TFT array substrate is completed.
As has been discussed, according to the conventional manufacturing method of the active matrix type liquid crystal display, the TFT array substrate is manufactured by the manufacturing procedure which repeats the photo-litho process (photo-etching process) four times to form the pixel electrode
126
, the external outlet electrode portion of the source signal lines
124
, and the external outlet electrode portion of the gate signal line
102
separately.
According to the above conventional manufacturing method of the active matrix type liquid crystal display, however, the source metal film
106
is formed by means of sputtering, etc. without patterning after the insulating films
103
and
103
′, high-resistance semiconductor film
104
, and low-resistance semiconductor film
105
are formed sequentially by means of plasma CVD, etc. Thus, an interface between the low-resistance semiconductor film
105
and source metal film
106
is quite large. In other words, both the low-resistance semiconductor film
105
and source metal film
106
are formed on the entire TFT array substrate. Thus, when the source metal film
106
is formed, these two films contact with each other in an area as large as the entire TFT array substrate. Hence, the area of the interface is substantially as large as that of the entire TFT array substrate.
Also, the semiconductor layer composed of the high-resistance semiconductor film
104
and low-resistance semiconductor film
105
has a large film stress (when a stress is applied, a corresponding strain is produced, and the film stress is defined as the ratio of stress to the strain of the film per unit area on the film surface). Thus, adhesion between the low-resistance semiconductor film
105
and source metal film
106
becomes poor due to a large interface therebetween, thereby causing problematic film separation between the
Lee Jr. Granvill D
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
Smith Matthew
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